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Commit 44a45b55 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Linus Walleij
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pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 



The arrays are never modified, declare them as const.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent f41a1efe

drivers/pinctrl/sh-pfc/pfc-r8a73a4.c

+1 −1
Original line number Diff line number Diff line
@@ -1272,7 +1272,7 @@ static const u16 pinmux_data[] = { 
#define R8A73A4_PIN_IO_PU_PD(pin)       SH_PFC_PIN_CFG(pin, __IO | __PUD)

#define R8A73A4_PIN_O(pin)              SH_PFC_PIN_CFG(pin, __O)



static struct sh_pfc_pin pinmux_pins[] = {

static const struct sh_pfc_pin pinmux_pins[] = {

	R8A73A4_PIN_IO_PU_PD(0), R8A73A4_PIN_IO_PU_PD(1),

	R8A73A4_PIN_IO_PU_PD(2), R8A73A4_PIN_IO_PU_PD(3),

	R8A73A4_PIN_IO_PU_PD(4), R8A73A4_PIN_IO_PU_PD(5),

drivers/pinctrl/sh-pfc/pfc-r8a7740.c

+1 −1
Original line number Diff line number Diff line
@@ -1543,7 +1543,7 @@ static const u16 pinmux_data[] = { 
#define R8A7740_PIN_O(pin)		SH_PFC_PIN_CFG(pin, __O)

#define R8A7740_PIN_O_PU_PD(pin)	SH_PFC_PIN_CFG(pin, __O | __PUD)



static struct sh_pfc_pin pinmux_pins[] = {

static const struct sh_pfc_pin pinmux_pins[] = {

	/* Table 56-1 (I/O and Pull U/D) */

	R8A7740_PIN_IO_PD(0),		R8A7740_PIN_IO_PD(1),

	R8A7740_PIN_IO_PD(2),		R8A7740_PIN_IO_PD(3),

drivers/pinctrl/sh-pfc/pfc-r8a7778.c

+2 −2
Original line number Diff line number Diff line
@@ -1260,7 +1260,7 @@ static const u16 pinmux_data[] = { 
 */

#define PIN_NUMBER(row, col)		(1000+((row)-1)*25+(col)-1)



static struct sh_pfc_pin pinmux_pins[] = {

static const struct sh_pfc_pin pinmux_pins[] = {

	PINMUX_GPIO_GP_ALL(),



	/* Pins not associated with a GPIO port */
@@ -2104,7 +2104,7 @@ static const struct sh_pfc_function pinmux_functions[] = { 
	SH_PFC_FUNCTION(vin1),

};



static struct pinmux_cfg_reg pinmux_config_regs[] = {

static const struct pinmux_cfg_reg pinmux_config_regs[] = {

	{ PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) {

		GP_0_31_FN,	FN_IP1_14_11,

		GP_0_30_FN,	FN_IP1_10_8,

drivers/pinctrl/sh-pfc/pfc-r8a7779.c

+1 −1
Original line number Diff line number Diff line
@@ -1410,7 +1410,7 @@ static const u16 pinmux_data[] = { 
	PINMUX_IPSR_MODSEL_DATA(IP12_17_15, SCK4_B, SEL_SCIF4_1),

};



static struct sh_pfc_pin pinmux_pins[] = {

static const struct sh_pfc_pin pinmux_pins[] = {

	PINMUX_GPIO_GP_ALL(),

};

drivers/pinctrl/sh-pfc/pfc-r8a7790.c

+2 −2
Original line number Diff line number Diff line
@@ -1731,7 +1731,7 @@ static const u16 pinmux_data[] = { 
#define PIN_NUMBER(r, c) (((r) - 'A') * 31 + (c) + 200)

#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)



static struct sh_pfc_pin pinmux_pins[] = {

static const struct sh_pfc_pin pinmux_pins[] = {

	PINMUX_GPIO_GP_ALL(),



	/* Pins not associated with a GPIO port */
@@ -4237,7 +4237,7 @@ static const struct sh_pfc_function pinmux_functions[] = { 
	SH_PFC_FUNCTION(vin3),

};



static struct pinmux_cfg_reg pinmux_config_regs[] = {

static const struct pinmux_cfg_reg pinmux_config_regs[] = {

	{ PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {

		GP_0_31_FN, FN_IP3_17_15,

		GP_0_30_FN, FN_IP3_14_12,