Loading Documentation/devicetree/bindings/spi/spi-cadence.txt 0 → 100644 +31 −0 Original line number Diff line number Diff line Cadence SPI controller Device Tree Bindings ------------------------------------------- Required properties: - compatible : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6". - reg : Physical base address and size of SPI registers map. - interrupts : Property with a value describing the interrupt number. - interrupt-parent : Must be core interrupt controller - clock-names : List of input clock names - "ref_clk", "pclk" (See clock bindings for details). - clocks : Clock phandles (see clock bindings for details). Optional properties: - num-cs : Number of chip selects used. If a decoder is used, this will be the number of chip selects after the decoder. - is-decoded-cs : Flag to indicate whether decoder is used or not. Example: spi@e0007000 { compatible = "xlnx,zynq-spi-r1p6"; clock-names = "ref_clk", "pclk"; clocks = <&clkc 26>, <&clkc 35>; interrupt-parent = <&intc>; interrupts = <0 49 4>; num-cs = <4>; is-decoded-cs = <0>; reg = <0xe0007000 0x1000>; } ; arch/blackfin/mach-bf609/boards/ezkit.c +11 −11 Original line number Diff line number Diff line Loading @@ -20,7 +20,7 @@ #include <linux/pinctrl/machine.h> #include <linux/pinctrl/pinconf-generic.h> #include <linux/platform_data/pinctrl-adi2.h> #include <asm/bfin_spi3.h> #include <linux/spi/adi_spi3.h> #include <asm/dma.h> #include <asm/gpio.h> #include <asm/nand.h> Loading Loading @@ -767,13 +767,13 @@ static struct flash_platform_data bfin_spi_flash_data = { .type = "w25q32", }; static struct bfin_spi3_chip spi_flash_chip_info = { static struct adi_spi3_chip spi_flash_chip_info = { .enable_dma = true, /* use dma transfer with this chip*/ }; #endif #if IS_ENABLED(CONFIG_SPI_SPIDEV) static struct bfin_spi3_chip spidev_chip_info = { static struct adi_spi3_chip spidev_chip_info = { .enable_dma = true, }; #endif Loading Loading @@ -1736,7 +1736,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { }, #endif }; #if IS_ENABLED(CONFIG_SPI_BFIN_V3) #if IS_ENABLED(CONFIG_SPI_ADI_V3) /* SPI (0) */ static struct resource bfin_spi0_resource[] = { { Loading Loading @@ -1777,13 +1777,13 @@ static struct resource bfin_spi1_resource[] = { }; /* SPI controller data */ static struct bfin_spi3_master bf60x_spi_master_info0 = { static struct adi_spi3_master bf60x_spi_master_info0 = { .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, }; static struct platform_device bf60x_spi_master0 = { .name = "bfin-spi3", .name = "adi-spi3", .id = 0, /* Bus number */ .num_resources = ARRAY_SIZE(bfin_spi0_resource), .resource = bfin_spi0_resource, Loading @@ -1792,13 +1792,13 @@ static struct platform_device bf60x_spi_master0 = { }, }; static struct bfin_spi3_master bf60x_spi_master_info1 = { static struct adi_spi3_master bf60x_spi_master_info1 = { .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, }; static struct platform_device bf60x_spi_master1 = { .name = "bfin-spi3", .name = "adi-spi3", .id = 1, /* Bus number */ .num_resources = ARRAY_SIZE(bfin_spi1_resource), .resource = bfin_spi1_resource, Loading Loading @@ -1990,7 +1990,7 @@ static struct platform_device *ezkit_devices[] __initdata = { &bfin_sdh_device, #endif #if IS_ENABLED(CONFIG_SPI_BFIN_V3) #if IS_ENABLED(CONFIG_SPI_ADI_V3) &bf60x_spi_master0, &bf60x_spi_master1, #endif Loading Loading @@ -2051,8 +2051,8 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = { PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.1", "pinctrl-adi2.0", NULL, "uart1"), PIN_MAP_MUX_GROUP_DEFAULT("bfin-sdh.0", "pinctrl-adi2.0", NULL, "rsi0"), PIN_MAP_MUX_GROUP_DEFAULT("stmmaceth.0", "pinctrl-adi2.0", NULL, "eth0"), PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi3.0", "pinctrl-adi2.0", NULL, "spi0"), PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi3.1", "pinctrl-adi2.0", NULL, "spi1"), PIN_MAP_MUX_GROUP_DEFAULT("adi-spi3.0", "pinctrl-adi2.0", NULL, "spi0"), PIN_MAP_MUX_GROUP_DEFAULT("adi-spi3.1", "pinctrl-adi2.0", NULL, "spi1"), PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.0", "pinctrl-adi2.0", NULL, "twi0"), PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.1", "pinctrl-adi2.0", NULL, "twi1"), PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary", "pinctrl-adi2.0", NULL, "rotary"), Loading arch/blackfin/mach-bf609/clock.c +7 −0 Original line number Diff line number Diff line Loading @@ -363,6 +363,12 @@ static struct clk ethclk = { .ops = &dummy_clk_ops, }; static struct clk spiclk = { .name = "spi", .parent = &sclk1, .ops = &dummy_clk_ops, }; static struct clk_lookup bf609_clks[] = { CLK(sys_clkin, NULL, "SYS_CLKIN"), CLK(pll_clk, NULL, "PLLCLK"), Loading @@ -375,6 +381,7 @@ static struct clk_lookup bf609_clks[] = { CLK(dclk, NULL, "DCLK"), CLK(oclk, NULL, "OCLK"), CLK(ethclk, NULL, "stmmaceth"), CLK(spiclk, NULL, "spi"), }; int __init clk_init(void) Loading drivers/spi/Kconfig +9 −2 Original line number Diff line number Diff line Loading @@ -91,8 +91,8 @@ config SPI_BFIN5XX help This is the SPI controller master driver for Blackfin 5xx processor. config SPI_BFIN_V3 tristate "SPI controller v3 for Blackfin" config SPI_ADI_V3 tristate "SPI controller v3 for ADI" depends on BF60x help This is the SPI controller v3 master driver Loading Loading @@ -148,6 +148,13 @@ config SPI_BUTTERFLY inexpensive battery powered microcontroller evaluation board. This same cable can be used to flash new firmware. config SPI_CADENCE tristate "Cadence SPI controller" depends on ARM help This selects the Cadence SPI controller master driver used by Xilinx Zynq. config SPI_CLPS711X tristate "CLPS711X host SPI controller" depends on ARCH_CLPS711X || COMPILE_TEST Loading drivers/spi/Makefile +2 −1 Original line number Diff line number Diff line Loading @@ -18,10 +18,11 @@ obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o obj-$(CONFIG_SPI_BFIN_V3) += spi-bfin-v3.o obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o Loading Loading
Documentation/devicetree/bindings/spi/spi-cadence.txt 0 → 100644 +31 −0 Original line number Diff line number Diff line Cadence SPI controller Device Tree Bindings ------------------------------------------- Required properties: - compatible : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6". - reg : Physical base address and size of SPI registers map. - interrupts : Property with a value describing the interrupt number. - interrupt-parent : Must be core interrupt controller - clock-names : List of input clock names - "ref_clk", "pclk" (See clock bindings for details). - clocks : Clock phandles (see clock bindings for details). Optional properties: - num-cs : Number of chip selects used. If a decoder is used, this will be the number of chip selects after the decoder. - is-decoded-cs : Flag to indicate whether decoder is used or not. Example: spi@e0007000 { compatible = "xlnx,zynq-spi-r1p6"; clock-names = "ref_clk", "pclk"; clocks = <&clkc 26>, <&clkc 35>; interrupt-parent = <&intc>; interrupts = <0 49 4>; num-cs = <4>; is-decoded-cs = <0>; reg = <0xe0007000 0x1000>; } ;
arch/blackfin/mach-bf609/boards/ezkit.c +11 −11 Original line number Diff line number Diff line Loading @@ -20,7 +20,7 @@ #include <linux/pinctrl/machine.h> #include <linux/pinctrl/pinconf-generic.h> #include <linux/platform_data/pinctrl-adi2.h> #include <asm/bfin_spi3.h> #include <linux/spi/adi_spi3.h> #include <asm/dma.h> #include <asm/gpio.h> #include <asm/nand.h> Loading Loading @@ -767,13 +767,13 @@ static struct flash_platform_data bfin_spi_flash_data = { .type = "w25q32", }; static struct bfin_spi3_chip spi_flash_chip_info = { static struct adi_spi3_chip spi_flash_chip_info = { .enable_dma = true, /* use dma transfer with this chip*/ }; #endif #if IS_ENABLED(CONFIG_SPI_SPIDEV) static struct bfin_spi3_chip spidev_chip_info = { static struct adi_spi3_chip spidev_chip_info = { .enable_dma = true, }; #endif Loading Loading @@ -1736,7 +1736,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { }, #endif }; #if IS_ENABLED(CONFIG_SPI_BFIN_V3) #if IS_ENABLED(CONFIG_SPI_ADI_V3) /* SPI (0) */ static struct resource bfin_spi0_resource[] = { { Loading Loading @@ -1777,13 +1777,13 @@ static struct resource bfin_spi1_resource[] = { }; /* SPI controller data */ static struct bfin_spi3_master bf60x_spi_master_info0 = { static struct adi_spi3_master bf60x_spi_master_info0 = { .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, }; static struct platform_device bf60x_spi_master0 = { .name = "bfin-spi3", .name = "adi-spi3", .id = 0, /* Bus number */ .num_resources = ARRAY_SIZE(bfin_spi0_resource), .resource = bfin_spi0_resource, Loading @@ -1792,13 +1792,13 @@ static struct platform_device bf60x_spi_master0 = { }, }; static struct bfin_spi3_master bf60x_spi_master_info1 = { static struct adi_spi3_master bf60x_spi_master_info1 = { .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, }; static struct platform_device bf60x_spi_master1 = { .name = "bfin-spi3", .name = "adi-spi3", .id = 1, /* Bus number */ .num_resources = ARRAY_SIZE(bfin_spi1_resource), .resource = bfin_spi1_resource, Loading Loading @@ -1990,7 +1990,7 @@ static struct platform_device *ezkit_devices[] __initdata = { &bfin_sdh_device, #endif #if IS_ENABLED(CONFIG_SPI_BFIN_V3) #if IS_ENABLED(CONFIG_SPI_ADI_V3) &bf60x_spi_master0, &bf60x_spi_master1, #endif Loading Loading @@ -2051,8 +2051,8 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = { PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.1", "pinctrl-adi2.0", NULL, "uart1"), PIN_MAP_MUX_GROUP_DEFAULT("bfin-sdh.0", "pinctrl-adi2.0", NULL, "rsi0"), PIN_MAP_MUX_GROUP_DEFAULT("stmmaceth.0", "pinctrl-adi2.0", NULL, "eth0"), PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi3.0", "pinctrl-adi2.0", NULL, "spi0"), PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi3.1", "pinctrl-adi2.0", NULL, "spi1"), PIN_MAP_MUX_GROUP_DEFAULT("adi-spi3.0", "pinctrl-adi2.0", NULL, "spi0"), PIN_MAP_MUX_GROUP_DEFAULT("adi-spi3.1", "pinctrl-adi2.0", NULL, "spi1"), PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.0", "pinctrl-adi2.0", NULL, "twi0"), PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.1", "pinctrl-adi2.0", NULL, "twi1"), PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary", "pinctrl-adi2.0", NULL, "rotary"), Loading
arch/blackfin/mach-bf609/clock.c +7 −0 Original line number Diff line number Diff line Loading @@ -363,6 +363,12 @@ static struct clk ethclk = { .ops = &dummy_clk_ops, }; static struct clk spiclk = { .name = "spi", .parent = &sclk1, .ops = &dummy_clk_ops, }; static struct clk_lookup bf609_clks[] = { CLK(sys_clkin, NULL, "SYS_CLKIN"), CLK(pll_clk, NULL, "PLLCLK"), Loading @@ -375,6 +381,7 @@ static struct clk_lookup bf609_clks[] = { CLK(dclk, NULL, "DCLK"), CLK(oclk, NULL, "OCLK"), CLK(ethclk, NULL, "stmmaceth"), CLK(spiclk, NULL, "spi"), }; int __init clk_init(void) Loading
drivers/spi/Kconfig +9 −2 Original line number Diff line number Diff line Loading @@ -91,8 +91,8 @@ config SPI_BFIN5XX help This is the SPI controller master driver for Blackfin 5xx processor. config SPI_BFIN_V3 tristate "SPI controller v3 for Blackfin" config SPI_ADI_V3 tristate "SPI controller v3 for ADI" depends on BF60x help This is the SPI controller v3 master driver Loading Loading @@ -148,6 +148,13 @@ config SPI_BUTTERFLY inexpensive battery powered microcontroller evaluation board. This same cable can be used to flash new firmware. config SPI_CADENCE tristate "Cadence SPI controller" depends on ARM help This selects the Cadence SPI controller master driver used by Xilinx Zynq. config SPI_CLPS711X tristate "CLPS711X host SPI controller" depends on ARCH_CLPS711X || COMPILE_TEST Loading
drivers/spi/Makefile +2 −1 Original line number Diff line number Diff line Loading @@ -18,10 +18,11 @@ obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o obj-$(CONFIG_SPI_BFIN_V3) += spi-bfin-v3.o obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o Loading