Loading arch/arm/boot/dts/qcom/msm8996-v2.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -71,6 +71,10 @@ regulator-max-microvolt = <1015000>; }; &apc_apm { /delete-property/ qcom,clock-source-override; }; &apcc_cpr { compatible = "qcom,cpr3-msm8996-v2-hmss-regulator"; Loading arch/arm/boot/dts/qcom/msm8996.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -244,6 +244,7 @@ "apc1-cpu1-spm", "apc0-l2-spm", "apc1-l2-spm"; qcom,clock-source-override; }; intc: interrupt-controller@09bc0000 { Loading Loading
arch/arm/boot/dts/qcom/msm8996-v2.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -71,6 +71,10 @@ regulator-max-microvolt = <1015000>; }; &apc_apm { /delete-property/ qcom,clock-source-override; }; &apcc_cpr { compatible = "qcom,cpr3-msm8996-v2-hmss-regulator"; Loading
arch/arm/boot/dts/qcom/msm8996.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -244,6 +244,7 @@ "apc1-cpu1-spm", "apc0-l2-spm", "apc1-l2-spm"; qcom,clock-source-override; }; intc: interrupt-controller@09bc0000 { Loading