clk: msm: mdmfermium: Add support for 25MHz in emac_0_sys_25m_clk_src
SGMI driver needs support for 25 MHz in emac_0_sys_25m_clk_src. Use
125 MHz emac source PLL to derive rate of 25 MHz using divider.
Change-Id: Ibc74d43cc97974ca01177ff09575e0ce168949c3
Signed-off-by:
Jaydeep Sen <jsen@codeaurora.org>
Loading
Please register or sign in to comment