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Commit 42d96abb authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'mxs/cleanup' into next/dt2 



This is a dependency for mxs/dt

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 07961ac7 e933a1a1

arch/arm/Kconfig

+3 −0
Original line number Diff line number Diff line
@@ -473,12 +473,14 @@ config ARCH_MXS 
	select ARCH_REQUIRE_GPIOLIB

	select CLKDEV_LOOKUP

	select CLKSRC_MMIO

	select CLKSRC_OF

	select COMMON_CLK

	select GENERIC_CLOCKEVENTS

	select HAVE_CLK_PREPARE

	select MULTI_IRQ_HANDLER

	select PINCTRL

	select SPARSE_IRQ

	select STMP_DEVICE

	select USE_OF

	help

	  Support for Freescale MXS-based family of processors
@@ -1593,6 +1595,7 @@ config HAVE_ARM_ARCH_TIMER 
config HAVE_ARM_TWD

	bool

	depends on SMP

	select CLKSRC_OF if OF

	help

	  This options enables support for the ARM timer and watchdog unit

arch/arm/boot/dts/imx23.dtsi

+4 −1
Original line number Diff line number Diff line
@@ -295,6 +295,7 @@ 
			};



			digctl@8001c000 {

				compatible = "fsl,imx23-digctl";

				reg = <0x8001c000 2000>;

				status = "disabled";

			};
@@ -321,6 +322,7 @@ 
			};



			ocotp@8002c000 {

				compatible = "fsl,ocotp";

				reg = <0x8002c000 0x2000>;

				status = "disabled";

			};
@@ -360,7 +362,7 @@ 
			ranges;



			clks: clkctrl@80040000 {

				compatible = "fsl,imx23-clkctrl";

				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";

				reg = <0x80040000 0x2000>;

				#clock-cells = <1>;

			};
@@ -426,6 +428,7 @@ 
				compatible = "fsl,imx23-timrot", "fsl,timrot";

				reg = <0x80068000 0x2000>;

				interrupts = <28 29 30 31>;

				clocks = <&clks 28>;

			};



			auart0: serial@8006c000 {

arch/arm/boot/dts/imx28.dtsi

+4 −1
Original line number Diff line number Diff line
@@ -647,6 +647,7 @@ 
			};



			digctl@8001c000 {

				compatible = "fsl,imx28-digctl";

				reg = <0x8001c000 0x2000>;

				interrupts = <89>;

				status = "disabled";
@@ -676,6 +677,7 @@ 
			};



			ocotp@8002c000 {

				compatible = "fsl,ocotp";

				reg = <0x8002c000 0x2000>;

				status = "disabled";

			};
@@ -755,7 +757,7 @@ 
			ranges;



			clks: clkctrl@80040000 {

				compatible = "fsl,imx28-clkctrl";

				compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";

				reg = <0x80040000 0x2000>;

				#clock-cells = <1>;

			};
@@ -838,6 +840,7 @@ 
				compatible = "fsl,imx28-timrot", "fsl,timrot";

				reg = <0x80068000 0x2000>;

				interrupts = <48 49 50 51>;

				clocks = <&clks 26>;

			};



			auart0: serial@8006a000 {

arch/arm/include/asm/smp_twd.h

+0 −8
Original line number Diff line number Diff line
@@ -34,12 +34,4 @@ struct twd_local_timer name __initdata = { \ 


int twd_local_timer_register(struct twd_local_timer *);



#ifdef CONFIG_HAVE_ARM_TWD

void twd_local_timer_of_register(void);

#else

static inline void twd_local_timer_of_register(void)

{

}

#endif



#endif

arch/arm/kernel/smp_twd.c

+4 −13
Original line number Diff line number Diff line
@@ -362,25 +362,13 @@ int __init twd_local_timer_register(struct twd_local_timer *tlt) 
}



#ifdef CONFIG_OF

const static struct of_device_id twd_of_match[] __initconst = {

	{ .compatible = "arm,cortex-a9-twd-timer",	},

	{ .compatible = "arm,cortex-a5-twd-timer",	},

	{ .compatible = "arm,arm11mp-twd-timer",	},

	{ },

};



void __init twd_local_timer_of_register(void)

static void __init twd_local_timer_of_register(struct device_node *np)

{

	struct device_node *np;

	int err;



	if (!is_smp() || !setup_max_cpus)

		return;



	np = of_find_matching_node(NULL, twd_of_match);

	if (!np)

		return;



	twd_ppi = irq_of_parse_and_map(np, 0);

	if (!twd_ppi) {

		err = -EINVAL;
@@ -398,4 +386,7 @@ void __init twd_local_timer_of_register(void) 
out:

	WARN(err, "twd_local_timer_of_register failed (%d)\n", err);

}

CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);

CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);

CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);

#endif