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Commit 42cc37fe authored by Baruch Siach's avatar Baruch Siach Committed by Mauro Carvalho Chehab
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[media] mx2_camera: fix pixel clock polarity configuration 



When SOCAM_PCLK_SAMPLE_FALLING, just leave CSICR1_REDGE unset, otherwise we get
the inverted behaviour.

Signed-off-by: default avatarBaruch Siach <baruch@tkos.co.il>
Signed-off-by: default avatarGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 0e4d413a

drivers/media/video/mx2_camera.c

+0 −2
Original line number Diff line number Diff line
@@ -807,8 +807,6 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd, 


	if (common_flags & SOCAM_PCLK_SAMPLE_RISING)

		csicr1 |= CSICR1_REDGE;

	if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)

		csicr1 |= CSICR1_INV_PCLK;

	if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)

		csicr1 |= CSICR1_SOF_POL;

	if (common_flags & SOCAM_HSYNC_ACTIVE_HIGH)