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Commit 42be3f35 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 fixes from Catalin Marinas:
 - Relax VDSO alignment requirements so that the kernel-picked one (4K)
   does not conflict with the dynamic linker's one (64K)
 - VDSO gettimeofday fix
 - Barrier fixes for atomic operations and cache flushing
 - TLB invalidation when overriding early page mappings during boot
 - Wired up new 32-bit arm (compat) syscalls
 - LSM_MMAP_MIN_ADDR when COMPAT is enabled
 - defconfig update
 - Clean-up (comments, pgd_alloc).

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: defconfig: Expand default enabled features
  arm64: asm: remove redundant "cc" clobbers
  arm64: atomics: fix use of acquire + release for full barrier semantics
  arm64: barriers: allow dsb macro to take option parameter
  security: select correct default LSM_MMAP_MIN_ADDR on arm on arm64
  arm64: compat: Wire up new AArch32 syscalls
  arm64: vdso: update wtm fields for CLOCK_MONOTONIC_COARSE
  arm64: vdso: fix coarse clock handling
  arm64: simplify pgd_alloc
  arm64: fix typo: s/SERRROR/SERROR/
  arm64: Invalidate the TLB when replacing pmd entries during boot
  arm64: Align CMA sizes to PAGE_SIZE
  arm64: add DSB after icache flush in __flush_icache_all()
  arm64: vdso: prevent ld from aligning PT_LOAD segments to 64k
parents d94d0e27 55834a77

arch/arm64/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ config ARM64 
	select HAVE_GENERIC_DMA_COHERENT

	select HAVE_HW_BREAKPOINT if PERF_EVENTS

	select HAVE_MEMBLOCK

	select HAVE_PATA_PLATFORM

	select HAVE_PERF_EVENTS

	select IRQ_DOMAIN

	select MODULES_USE_ELF_RELA

arch/arm64/configs/defconfig

+14 −4
Original line number Diff line number Diff line 
CONFIG_EXPERIMENTAL=y

# CONFIG_LOCALVERSION_AUTO is not set

# CONFIG_SWAP is not set

CONFIG_SYSVIPC=y
@@ -19,6 +18,7 @@ CONFIG_BLK_DEV_INITRD=y 
CONFIG_KALLSYMS_ALL=y

# CONFIG_COMPAT_BRK is not set

CONFIG_PROFILING=y

CONFIG_JUMP_LABEL=y

CONFIG_MODULES=y

CONFIG_MODULE_UNLOAD=y

# CONFIG_BLK_DEV_BSG is not set
@@ -27,6 +27,7 @@ CONFIG_ARCH_VEXPRESS=y 
CONFIG_ARCH_XGENE=y

CONFIG_SMP=y

CONFIG_PREEMPT=y

CONFIG_CMA=y

CONFIG_CMDLINE="console=ttyAMA0"

# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set

CONFIG_COMPAT=y
@@ -42,14 +43,17 @@ CONFIG_IP_PNP_BOOTP=y 
# CONFIG_WIRELESS is not set

CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"

CONFIG_DEVTMPFS=y

CONFIG_BLK_DEV=y

CONFIG_DMA_CMA=y

CONFIG_SCSI=y

# CONFIG_SCSI_PROC_FS is not set

CONFIG_BLK_DEV_SD=y

# CONFIG_SCSI_LOWLEVEL is not set

CONFIG_ATA=y

CONFIG_PATA_PLATFORM=y

CONFIG_PATA_OF_PLATFORM=y

CONFIG_NETDEVICES=y

CONFIG_MII=y

CONFIG_SMC91X=y

CONFIG_SMSC911X=y

# CONFIG_WLAN is not set

CONFIG_INPUT_EVDEV=y

# CONFIG_SERIO_I8042 is not set
@@ -62,13 +66,19 @@ CONFIG_SERIAL_AMBA_PL011=y 
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y

# CONFIG_HW_RANDOM is not set

# CONFIG_HWMON is not set

CONFIG_REGULATOR=y

CONFIG_REGULATOR_FIXED_VOLTAGE=y

CONFIG_FB=y

# CONFIG_VGA_CONSOLE is not set

CONFIG_FRAMEBUFFER_CONSOLE=y

CONFIG_LOGO=y

# CONFIG_LOGO_LINUX_MONO is not set

# CONFIG_LOGO_LINUX_VGA16 is not set

# CONFIG_USB_SUPPORT is not set

CONFIG_USB=y

CONFIG_USB_ISP1760_HCD=y

CONFIG_USB_STORAGE=y

CONFIG_MMC=y

CONFIG_MMC_ARMMMCI=y

# CONFIG_IOMMU_SUPPORT is not set

CONFIG_EXT2_FS=y

CONFIG_EXT3_FS=y

arch/arm64/include/asm/atomic.h

+30 −23
Original line number Diff line number Diff line
@@ -54,8 +54,7 @@ static inline void atomic_add(int i, atomic_t *v) 
"	stxr	%w1, %w0, %2\n"

"	cbnz	%w1, 1b"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	: "Ir" (i)

	: "cc");

	: "Ir" (i));

}



static inline int atomic_add_return(int i, atomic_t *v)
@@ -64,14 +63,15 @@ static inline int atomic_add_return(int i, atomic_t *v) 
	int result;



	asm volatile("// atomic_add_return\n"

"1:	ldaxr	%w0, %2\n"

"1:	ldxr	%w0, %2\n"

"	add	%w0, %w0, %w3\n"

"	stlxr	%w1, %w0, %2\n"

"	cbnz	%w1, 1b"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	: "Ir" (i)

	: "cc", "memory");

	: "memory");



	smp_mb();

	return result;

}
@@ -86,8 +86,7 @@ static inline void atomic_sub(int i, atomic_t *v) 
"	stxr	%w1, %w0, %2\n"

"	cbnz	%w1, 1b"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	: "Ir" (i)

	: "cc");

	: "Ir" (i));

}



static inline int atomic_sub_return(int i, atomic_t *v)
@@ -96,14 +95,15 @@ static inline int atomic_sub_return(int i, atomic_t *v) 
	int result;



	asm volatile("// atomic_sub_return\n"

"1:	ldaxr	%w0, %2\n"

"1:	ldxr	%w0, %2\n"

"	sub	%w0, %w0, %w3\n"

"	stlxr	%w1, %w0, %2\n"

"	cbnz	%w1, 1b"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	: "Ir" (i)

	: "cc", "memory");

	: "memory");



	smp_mb();

	return result;

}
@@ -112,17 +112,20 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) 
	unsigned long tmp;

	int oldval;



	smp_mb();



	asm volatile("// atomic_cmpxchg\n"

"1:	ldaxr	%w1, %2\n"

"1:	ldxr	%w1, %2\n"

"	cmp	%w1, %w3\n"

"	b.ne	2f\n"

"	stlxr	%w0, %w4, %2\n"

"	stxr	%w0, %w4, %2\n"

"	cbnz	%w0, 1b\n"

"2:"

	: "=&r" (tmp), "=&r" (oldval), "+Q" (ptr->counter)

	: "Ir" (old), "r" (new)

	: "cc", "memory");

	: "cc");



	smp_mb();

	return oldval;

}
@@ -173,8 +176,7 @@ static inline void atomic64_add(u64 i, atomic64_t *v) 
"	stxr	%w1, %0, %2\n"

"	cbnz	%w1, 1b"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	: "Ir" (i)

	: "cc");

	: "Ir" (i));

}



static inline long atomic64_add_return(long i, atomic64_t *v)
@@ -183,14 +185,15 @@ static inline long atomic64_add_return(long i, atomic64_t *v) 
	unsigned long tmp;



	asm volatile("// atomic64_add_return\n"

"1:	ldaxr	%0, %2\n"

"1:	ldxr	%0, %2\n"

"	add	%0, %0, %3\n"

"	stlxr	%w1, %0, %2\n"

"	cbnz	%w1, 1b"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	: "Ir" (i)

	: "cc", "memory");

	: "memory");



	smp_mb();

	return result;

}
@@ -205,8 +208,7 @@ static inline void atomic64_sub(u64 i, atomic64_t *v) 
"	stxr	%w1, %0, %2\n"

"	cbnz	%w1, 1b"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	: "Ir" (i)

	: "cc");

	: "Ir" (i));

}



static inline long atomic64_sub_return(long i, atomic64_t *v)
@@ -215,14 +217,15 @@ static inline long atomic64_sub_return(long i, atomic64_t *v) 
	unsigned long tmp;



	asm volatile("// atomic64_sub_return\n"

"1:	ldaxr	%0, %2\n"

"1:	ldxr	%0, %2\n"

"	sub	%0, %0, %3\n"

"	stlxr	%w1, %0, %2\n"

"	cbnz	%w1, 1b"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	: "Ir" (i)

	: "cc", "memory");

	: "memory");



	smp_mb();

	return result;

}
@@ -231,17 +234,20 @@ static inline long atomic64_cmpxchg(atomic64_t *ptr, long old, long new) 
	long oldval;

	unsigned long res;



	smp_mb();



	asm volatile("// atomic64_cmpxchg\n"

"1:	ldaxr	%1, %2\n"

"1:	ldxr	%1, %2\n"

"	cmp	%1, %3\n"

"	b.ne	2f\n"

"	stlxr	%w0, %4, %2\n"

"	stxr	%w0, %4, %2\n"

"	cbnz	%w0, 1b\n"

"2:"

	: "=&r" (res), "=&r" (oldval), "+Q" (ptr->counter)

	: "Ir" (old), "r" (new)

	: "cc", "memory");

	: "cc");



	smp_mb();

	return oldval;

}
@@ -253,11 +259,12 @@ static inline long atomic64_dec_if_positive(atomic64_t *v) 
	unsigned long tmp;



	asm volatile("// atomic64_dec_if_positive\n"

"1:	ldaxr	%0, %2\n"

"1:	ldxr	%0, %2\n"

"	subs	%0, %0, #1\n"

"	b.mi	2f\n"

"	stlxr	%w1, %0, %2\n"

"	cbnz	%w1, 1b\n"

"	dmb	ish\n"

"2:"

	: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)

	:

arch/arm64/include/asm/barrier.h

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
#define wfi()		asm volatile("wfi" : : : "memory")



#define isb()		asm volatile("isb" : : : "memory")

#define dsb()		asm volatile("dsb sy" : : : "memory")

#define dsb(opt)	asm volatile("dsb sy" : : : "memory")



#define mb()		dsb()

#define rmb()		asm volatile("dsb ld" : : : "memory")

arch/arm64/include/asm/cacheflush.h

+1 −0
Original line number Diff line number Diff line
@@ -116,6 +116,7 @@ extern void flush_dcache_page(struct page *); 
static inline void __flush_icache_all(void)

{

	asm("ic	ialluis");

	dsb();

}



#define flush_dcache_mmap_lock(mapping) \