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Commit 429e8fd3 authored by Sandeep Panda's avatar Sandeep Panda Committed by Gerrit - the friendly Code Review server
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msm: mdss: update DSI PHY enable sequence based on PHY revision 



In the current implementation DSI controller version is used to
determine which PHY enable sequence should be used. But this will
fail in case of platforms where DSI controller version is same as
older platforms but PHY version is new. So change the version check
to be based on PHY version instead for controller version.

Change-Id: I636a6442e84f1bd549b6a125cfb991402e53c796
Signed-off-by: default avatarSandeep Panda <spanda@codeaurora.org>
parent 188ab649

drivers/video/msm/mdss/msm_mdss_io_8974.c

+26 −36
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 


#include "mdss_dsi.h"

#include "mdss_edp.h"

#include "mdss_dsi_phy.h"



#define MDSS_DSI_DSIPHY_REGULATOR_CTRL_0	0x00

#define MDSS_DSI_DSIPHY_REGULATOR_CTRL_1	0x04
@@ -440,10 +441,7 @@ void mdss_dsi_phy_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl) 
		return;

	}



	if (IS_MDSS_MAJOR_MINOR_SAME(ctrl->shared_data->hw_rev,

		MDSS_DSI_HW_REV_104) &&

		(MDSS_GET_STEP(ctrl->shared_data->hw_rev) !=

		MDSS_DSI_HW_REV_STEP_2)) {

	if (ctrl->shared_data->phy_rev == DSI_PHY_REV_20) {

		if (mdss_dsi_is_ctrl_clk_master(ctrl))

			sctrl = mdss_dsi_get_ctrl_clk_slave();

		else
@@ -480,10 +478,7 @@ static void mdss_dsi_phy_regulator_disable(struct mdss_dsi_ctrl_pdata *ctrl) 
		return;

	}



	if (IS_MDSS_MAJOR_MINOR_SAME(ctrl->shared_data->hw_rev,

		MDSS_DSI_HW_REV_104) &&

		(MDSS_GET_STEP(ctrl->shared_data->hw_rev) !=

		MDSS_DSI_HW_REV_STEP_2))

	if (ctrl->shared_data->phy_rev == DSI_PHY_REV_20)

		return;



	MIPI_OUTP(ctrl->phy_regulator_io.base + 0x018, 0x000);
@@ -496,10 +491,7 @@ static void mdss_dsi_phy_shutdown(struct mdss_dsi_ctrl_pdata *ctrl) 
		return;

	}



	if (IS_MDSS_MAJOR_MINOR_SAME(ctrl->shared_data->hw_rev,

		MDSS_DSI_HW_REV_104) &&

		(MDSS_GET_STEP(ctrl->shared_data->hw_rev) !=

		MDSS_DSI_HW_REV_STEP_2)) {

	if (ctrl->shared_data->phy_rev == DSI_PHY_REV_20) {

		MIPI_OUTP(ctrl->phy_io.base + DSIPHY_PLL_CLKBUFLR_EN, 0);

		MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_GLBL_TEST_CTRL, 0);

		MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, 0);
@@ -524,10 +516,7 @@ void mdss_dsi_lp_cd_rx(struct mdss_dsi_ctrl_pdata *ctrl) 
		return;

	}



	if (IS_MDSS_MAJOR_MINOR_SAME(ctrl->shared_data->hw_rev,

		MDSS_DSI_HW_REV_104) &&

		(MDSS_GET_STEP(ctrl->shared_data->hw_rev) !=

		MDSS_DSI_HW_REV_STEP_2))

	if (ctrl->shared_data->phy_rev == DSI_PHY_REV_20)

		return;



	pd = &(((ctrl->panel_data).panel_info.mipi).dsi_phy_db);
@@ -964,11 +953,10 @@ static void mdss_dsi_phy_regulator_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, 


	mutex_lock(&sdata->phy_reg_lock);

	if (enable) {

		switch (ctrl->shared_data->hw_rev) {

		case MDSS_DSI_HW_REV_104:

		case MDSS_DSI_HW_REV_104_1:

		if (ctrl->shared_data->phy_rev == DSI_PHY_REV_20) {

			mdss_dsi_8996_phy_regulator_enable(ctrl);

			break;

		} else {

			switch (ctrl->shared_data->hw_rev) {

			case MDSS_DSI_HW_REV_103:

				mdss_dsi_20nm_phy_regulator_enable(ctrl);

				break;
@@ -976,6 +964,7 @@ static void mdss_dsi_phy_regulator_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, 
				mdss_dsi_28nm_phy_regulator_enable(ctrl);

				break;

			}

		}

		ctrl->is_phyreg_enabled = 1;

	} else {

		/*
@@ -1005,11 +994,11 @@ static void mdss_dsi_phy_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, bool enable) 
	}



	if (enable) {

		switch (ctrl->shared_data->hw_rev) {

		case MDSS_DSI_HW_REV_104:

		case MDSS_DSI_HW_REV_104_1:



		if (ctrl->shared_data->phy_rev == DSI_PHY_REV_20) {

			mdss_dsi_8996_phy_config(ctrl);

			break;

		} else {

			switch (ctrl->shared_data->hw_rev) {

			case MDSS_DSI_HW_REV_103:

				mdss_dsi_20nm_phy_config(ctrl);

				break;
@@ -1017,6 +1006,7 @@ static void mdss_dsi_phy_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, bool enable) 
				mdss_dsi_28nm_phy_config(ctrl);

				break;

			}

		}

	} else {

		/*

		 * In split-dsi configuration, the phy should be disabled for