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Commit 429d3bc9 authored by David Collins's avatar David Collins
Browse files

ARM: dts: msm: reduce VDD_APCC voltage margin for aging on msm8996v3



Reduce the VDD_APCC open-loop voltage margin by 15 mV and the
closed-loop voltage margin by 10 mV for power cluster and
performance cluster corners corresponding to less than 600 MHz.

Also, reduce the VDD_APCC open-loop voltage margin by 15 mV and
the closed-loop voltage margin by 10 mV for all CBF clock
corners.

This removes the voltage margin associated with aging and allows
lower VDD_APCC operating voltage are parts that are not aged.

Change-Id: I243000f8f277e0284d9c87d11c2c50ec9e280a00
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent 450a8980
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+23 −8
Original line number Diff line number Diff line
@@ -660,13 +660,19 @@
					<0 0 0 0 0>;

				qcom,cpr-open-loop-voltage-adjustment =
					<       0        0        0        0
					<(-15000) (-15000) (-15000) (-15000)
					 (-50000) (-50000) (-50000) (-50000)
					 (-50000) (-50000) (-50000) (-50000)
					 (-50000) (-50000) (-50000) (-50000)>;
				qcom,cpr-open-loop-voltage-min-diff =
				       <0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0>;

				qcom,cpr-closed-loop-voltage-adjustment =
					<(-10000) (-10000) (-10000) (-10000)
						0        0        0        0
						0        0        0        0
						0        0        0        0>;

				qcom,allow-voltage-interpolation;
				qcom,allow-quotient-interpolation;
				qcom,cpr-scaled-open-loop-voltage-as-ceiling;
@@ -722,18 +728,18 @@
				       2519 2257 2668 2372    0    0    0    0>;

				qcom,cpr-open-loop-voltage-fuse-adjustment =
					<0 0 (-45000) (-20000) (-45000)>,
					<0 0 (-45000) (-20000) (-45000)>,
					<0 0 0 0 0>,
				 <(-15000) (-15000) (-60000) (-35000) (-60000)>,
				 <(-15000) (-15000) (-60000) (-35000) (-60000)>,
				 <(-15000) (-15000) (-15000) (-15000) (-15000)>,
					<0 0 0 0 0>,
					<0 0 0 0 0>,
					<0 0 0 0 0>,
					<0 0 0 0 0>,
					<0 0 0 0 0>;
				qcom,cpr-closed-loop-voltage-fuse-adjustment =
					<0 0 0 0 0>,
					<0 0 0 0 0>,
					<0 0 0 0 0>,
				 <(-10000) (-10000) (-10000) (-10000) (-10000)>,
				 <(-10000) (-10000) (-10000) (-10000) (-10000)>,
				 <(-10000) (-10000) (-10000) (-10000) (-10000)>,
					<0 0 0 0 0>,
					<0 0 0 0 0>,
					<0 0 0 0 0>,
@@ -830,7 +836,7 @@
					<0 0 0 0 0>;

				qcom,cpr-open-loop-voltage-adjustment =
					<       0        0        0        0
					<(-15000) (-15000) (-15000) (-15000)
					 (-50000) (-50000) (-50000) (-50000)
					 (-50000) (-50000) (-50000) (-50000)
					 (-50000) (-50000) (-50000) (-50000)
@@ -841,6 +847,15 @@
					<0 0 0 0 (-50000) 0 0 0 0 0 0 0 0 0 0 0
					 0 0 0 0 0 0 0 0 0>;

				qcom,cpr-closed-loop-voltage-adjustment =
					<(-10000) (-10000) (-10000) (-10000)
						0        0        0        0
						0        0        0        0
						0        0        0        0
						0        0        0        0
						0        0        0        0
						0>;

				qcom,allow-voltage-interpolation;
				qcom,allow-quotient-interpolation;
				qcom,cpr-scaled-open-loop-voltage-as-ceiling;
+2 −0
Original line number Diff line number Diff line
@@ -136,6 +136,7 @@

	/delete-property/ qcom,cpr-open-loop-voltage-adjustment;
	/delete-property/ qcom,cpr-open-loop-voltage-min-diff;
	/delete-property/ qcom,cpr-closed-loop-voltage-adjustment;
};

&apc0_cbf_vreg {
@@ -243,6 +244,7 @@

	/delete-property/ qcom,cpr-open-loop-voltage-adjustment;
	/delete-property/ qcom,cpr-open-loop-voltage-min-diff;
	/delete-property/ qcom,cpr-closed-loop-voltage-adjustment;
};

&gfx_cpr {