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Commit 421b446a authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Paul Mundt
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ARM: mach-shmobile: clock-sh7372: remove bogus pllc2 clock toggling. 



The PLLC2 clock was utilizing the same sort of enable/disable without
regard to usecount approach that the FSIDIV clock was when being used as
a PLL pass-through. This forces the enable/disable through the clock
framework, which now prevents the clock from being ripped out or modified
underneath users that have an existing handle on it.

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent b16a2892

arch/arm/mach-shmobile/board-ap4evb.c

+5 −0
Original line number Diff line number Diff line
@@ -969,6 +969,11 @@ static int __init hdmi_init_pm_clock(void) 
		goto out;

	}



	ret = clk_enable(&sh7372_pllc2_clk);

	if (ret < 0) {

		pr_err("Cannot enable pllc2 clock\n");

		goto out;

	}

	pr_debug("PLLC2 set frequency %lu\n", rate);



	ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);

arch/arm/mach-shmobile/clock-sh7372.c

+2 −10
Original line number Diff line number Diff line
@@ -230,21 +230,13 @@ static int pllc2_set_rate(struct clk *clk, 
	if (idx < 0)

		return idx;



	if (rate == clk->parent->rate) {

		pllc2_disable(clk);

		return 0;

	}

	if (rate == clk->parent->rate)

		return -EINVAL;



	value = __raw_readl(PLLC2CR) & ~(0x3f << 24);



	if (value & 0x80000000)

		pllc2_disable(clk);



	__raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR);



	if (value & 0x80000000)

		return pllc2_enable(clk);



	return 0;

}