Merge "arm64: perf: make functions non-static" (41dd080d) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm64/include/asm/pmu.h

+21 −0

Original line number	Original line	Diff line number	Diff line
	@@ -83,6 +83,17 @@ struct arm_pmu {

	#define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu))		#define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu))

			extern const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX];
			extern const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
			[PERF_COUNT_HW_CACHE_OP_MAX]
			[PERF_COUNT_HW_CACHE_RESULT_MAX];
			int map_cpu_event(struct perf_event *event,
			const unsigned (*event_map)[PERF_COUNT_HW_MAX],
			const unsigned (*cache_map)[PERF_COUNT_HW_CACHE_MAX]
			[PERF_COUNT_HW_CACHE_OP_MAX]
			[PERF_COUNT_HW_CACHE_RESULT_MAX],
			u32 raw_event_mask);

	int __init armpmu_register(struct arm_pmu armpmu, char name, int type);		int __init armpmu_register(struct arm_pmu armpmu, char name, int type);

	u64 armpmu_event_update(struct perf_event *event,		u64 armpmu_event_update(struct perf_event *event,
	@@ -93,5 +104,15 @@ int armpmu_event_set_period(struct perf_event *event,
	struct hw_perf_event *hwc,		struct hw_perf_event *hwc,
	int idx);		int idx);

			int armv8pmu_enable_intens(int idx);
			int armv8pmu_disable_intens(int idx);
			int armv8pmu_enable_counter(int idx);
			int armv8pmu_disable_counter(int idx);
			u32 armv8pmu_getreset_flags(void);
			void armv8pmu_pmcr_write(u32 val);
			void armv8pmu_write_evtype(int idx, u32 val);

			int kryo_pmu_init(struct arm_pmu *cpu_pmu);

	#endif /* CONFIG_HW_PERF_EVENTS */		#endif /* CONFIG_HW_PERF_EVENTS */
	#endif /* __ASM_PMU_H */		#endif /* __ASM_PMU_H */

arch/arm64/kernel/perf_event.c

+15 −15

Original line number	Original line	Diff line number	Diff line
	@@ -159,7 +159,7 @@ armpmu_map_raw_event(u32 raw_event_mask, u64 config)
	return (int)(config & raw_event_mask);		return (int)(config & raw_event_mask);
	}		}

	static int map_cpu_event(struct perf_event *event,		int map_cpu_event(struct perf_event *event,
	const unsigned (*event_map)[PERF_COUNT_HW_MAX],		const unsigned (*event_map)[PERF_COUNT_HW_MAX],
	const unsigned (*cache_map)		const unsigned (*cache_map)
	[PERF_COUNT_HW_CACHE_MAX]		[PERF_COUNT_HW_CACHE_MAX]
	@@ -658,7 +658,7 @@ enum armv8_pmuv3_perf_types {
	};		};

	/* PMUv3 HW events mapping. */		/* PMUv3 HW events mapping. */
	static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {		const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
	[PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES,		[PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES,
	[PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED,		[PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED,
	[PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS,		[PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS,
	@@ -670,7 +670,7 @@ static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,		[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
	};		};

	static const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]		const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
	[PERF_COUNT_HW_CACHE_OP_MAX]		[PERF_COUNT_HW_CACHE_OP_MAX]
	[PERF_COUNT_HW_CACHE_RESULT_MAX] = {		[PERF_COUNT_HW_CACHE_RESULT_MAX] = {
	[C(L1D)] = {		[C(L1D)] = {
	@@ -832,7 +832,7 @@ static inline u32 armv8pmu_pmcr_read(void)
	return val;		return val;
	}		}

	static inline void armv8pmu_pmcr_write(u32 val)		inline void armv8pmu_pmcr_write(u32 val)
	{		{
	val &= ARMV8_PMCR_MASK;		val &= ARMV8_PMCR_MASK;
	isb();		isb();
	@@ -908,7 +908,7 @@ static inline void armv8pmu_write_counter(int idx, u32 value)
	asm volatile("msr pmxevcntr_el0, %0" :: "r" (value));		asm volatile("msr pmxevcntr_el0, %0" :: "r" (value));
	}		}

	static inline void armv8pmu_write_evtype(int idx, u32 val)		inline void armv8pmu_write_evtype(int idx, u32 val)
	{		{
	if (armv8pmu_select_counter(idx) == idx) {		if (armv8pmu_select_counter(idx) == idx) {
	val &= ARMV8_EVTYPE_MASK;		val &= ARMV8_EVTYPE_MASK;
	@@ -916,7 +916,7 @@ static inline void armv8pmu_write_evtype(int idx, u32 val)
	}		}
	}		}

	static inline int armv8pmu_enable_counter(int idx)		inline int armv8pmu_enable_counter(int idx)
	{		{
	u32 counter;		u32 counter;

	@@ -931,7 +931,7 @@ static inline int armv8pmu_enable_counter(int idx)
	return idx;		return idx;
	}		}

	static inline int armv8pmu_disable_counter(int idx)		inline int armv8pmu_disable_counter(int idx)
	{		{
	u32 counter;		u32 counter;

	@@ -946,7 +946,7 @@ static inline int armv8pmu_disable_counter(int idx)
	return idx;		return idx;
	}		}

	static inline int armv8pmu_enable_intens(int idx)		inline int armv8pmu_enable_intens(int idx)
	{		{
	u32 counter;		u32 counter;

	@@ -961,7 +961,7 @@ static inline int armv8pmu_enable_intens(int idx)
	return idx;		return idx;
	}		}

	static inline int armv8pmu_disable_intens(int idx)		inline int armv8pmu_disable_intens(int idx)
	{		{
	u32 counter;		u32 counter;

	@@ -980,7 +980,7 @@ static inline int armv8pmu_disable_intens(int idx)
	return idx;		return idx;
	}		}

	static inline u32 armv8pmu_getreset_flags(void)		inline u32 armv8pmu_getreset_flags(void)
	{		{
	u32 value;		u32 value;