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Commit 40730d10 authored by Kenji Kaneshige's avatar Kenji Kaneshige Committed by Greg Kroah-Hartman
Browse files

pciehp: minor cleanups for pciehp_hpc.c 



Minor cleanups for pciehp_hpc.c. The 80 column rules, removing
unnecessary lines, and so on.

Signed-off-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: default avatarKristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 9fe81645

drivers/pci/hotplug/pciehp_hpc.c

+26 −21
Original line number Diff line number Diff line
@@ -203,7 +203,7 @@ static void int_poll_timeout(unsigned long data) 


	init_timer(&ctrl->poll_timer);

	if (!pciehp_poll_time)

		pciehp_poll_time = 2; /* reset timer to poll in 2 secs if user doesn't specify at module installation*/

		pciehp_poll_time = 2; /* default polling interval is 2 sec */



	start_int_poll_timer(ctrl, pciehp_poll_time);

}
@@ -320,7 +320,6 @@ static int hpc_check_lnk_status(struct controller *ctrl) 
	return retval;

}





static int hpc_get_attention_status(struct slot *slot, u8 *status)

{

	struct controller *ctrl = slot->ctrl;
@@ -392,7 +391,6 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) 
	return retval;

}





static int hpc_get_latch_status(struct slot *slot, u8 *status)

{

	struct controller *ctrl = slot->ctrl;
@@ -513,7 +511,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) 
	return rc;

}





static void hpc_set_green_led_on(struct slot *slot)

{

	struct controller *ctrl = slot->ctrl;
@@ -695,8 +692,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) 
		return IRQ_NONE;

	}



	intr_detect = ( ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | MRL_SENS_CHANGED |

					PRSN_DETECT_CHANGED | CMD_COMPLETED );

	intr_detect = (ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED |

		       MRL_SENS_CHANGED | PRSN_DETECT_CHANGED | CMD_COMPLETED);



	intr_loc = slot_status & intr_detect;
@@ -718,7 +715,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) 


		dbg("%s: pciehp_readw(SLOTCTRL) with value %x\n",

		    __FUNCTION__, temp_word);

		temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;

		temp_word = (temp_word & ~HP_INTR_ENABLE &

			     ~CMD_CMPL_INTR_ENABLE) | 0x00;

		rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);

		if (rc) {

			err("%s: Cannot write to SLOTCTRL register\n",
@@ -847,7 +845,8 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) 
	return retval;

}



static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value)

static int hpc_get_max_lnk_width(struct slot *slot,

				 enum pcie_link_width *value)

{

	struct controller *ctrl = slot->ctrl;

	enum pcie_link_width lnk_wdth;
@@ -924,7 +923,8 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) 
	return retval;

}



static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value)

static int hpc_get_cur_lnk_width(struct slot *slot,

				 enum pcie_link_width *value)

{

	struct controller *ctrl = slot->ctrl;

	enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN;
@@ -1067,8 +1067,6 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev) 
}

#endif







int pcie_init(struct controller * ctrl, struct pcie_device *dev)

{

	int rc;
@@ -1103,9 +1101,11 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) 
	dbg("%s: CAPREG offset %x cap_reg %x\n",

	    __FUNCTION__, ctrl->cap_base + CAPREG, cap_reg);



	if (((cap_reg & SLOT_IMPL) == 0) || (((cap_reg & DEV_PORT_TYPE) != 0x0040)

	if (((cap_reg & SLOT_IMPL) == 0) ||

	    (((cap_reg & DEV_PORT_TYPE) != 0x0040)

		&& ((cap_reg & DEV_PORT_TYPE) != 0x0060))) {

		dbg("%s : This is not a root port or the port is not connected to a slot\n", __FUNCTION__);

		dbg("%s : This is not a root port or the port is not "

		    "connected to a slot\n", __FUNCTION__);

		goto abort_free_ctlr;

	}
@@ -1144,7 +1144,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) 
			    (unsigned long long)pci_resource_start(pdev, rc),

			    (unsigned long long)pci_resource_len(pdev, rc));



	info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device,

	info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n",

	     pdev->vendor, pdev->device,

	     pdev->subsystem_vendor, pdev->subsystem_device);



	mutex_init(&ctrl->crit_sect);
@@ -1169,7 +1170,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) 


	dbg("%s: SLOTCTRL %x value read %x\n",

	    __FUNCTION__, ctrl->cap_base + SLOTCTRL, temp_word);

	temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;

	temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) |

		0x00;



	rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);

	if (rc) {
@@ -1247,7 +1249,10 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) 
		temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;

	}



	/* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */

	/*

	 * Unmask Hot-plug Interrupt Enable for the interrupt

	 * notification mechanism case.

	 */

	rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);

	if (rc) {

		err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__);