Loading drivers/platform/msm/ipa/ipa_v3/ipa_dp.c +88 −5 Original line number Diff line number Diff line Loading @@ -28,16 +28,24 @@ #define POLLING_MIN_SLEEP_TX 400 #define POLLING_MAX_SLEEP_TX 500 /* 8K less 1 nominal MTU (1500 bytes) rounded to units of KB */ #define IPA_MTU 1500 #define IPA_GENERIC_AGGR_BYTE_LIMIT 6 #define IPA_GENERIC_AGGR_TIME_LIMIT 1 #define IPA_GENERIC_AGGR_PKT_LIMIT 0 #define IPA_GENERIC_RX_BUFF_BASE_SZ 8192 #define IPA_REAL_GENERIC_RX_BUFF_SZ (SKB_DATA_ALIGN(\ IPA_GENERIC_RX_BUFF_BASE_SZ + NET_SKB_PAD) +\ #define IPA_REAL_GENERIC_RX_BUFF_SZ(X) (SKB_DATA_ALIGN(\ (X) + NET_SKB_PAD) +\ SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) #define IPA_GENERIC_RX_BUFF_SZ (IPA_GENERIC_RX_BUFF_BASE_SZ -\ (IPA_REAL_GENERIC_RX_BUFF_SZ - IPA_GENERIC_RX_BUFF_BASE_SZ)) #define IPA_GENERIC_RX_BUFF_SZ(X) ((X) -\ (IPA_REAL_GENERIC_RX_BUFF_SZ(X) - (X))) #define IPA_GENERIC_RX_BUFF_LIMIT (\ IPA_REAL_GENERIC_RX_BUFF_SZ(\ IPA_GENERIC_RX_BUFF_BASE_SZ) -\ IPA_GENERIC_RX_BUFF_BASE_SZ) /* less 1 nominal MTU (1500 bytes) rounded to units of KB */ #define IPA_ADJUST_AGGR_BYTE_LIMIT(X) (((X) - IPA_MTU)/1000) #define IPA_RX_BUFF_CLIENT_HEADROOM 256 Loading Loading @@ -90,6 +98,8 @@ static int ipa_handle_rx_core_sps(struct ipa3_sys_context *sys, static unsigned long tag_to_pointer_wa(uint64_t tag); static uint64_t pointer_to_tag_wa(struct ipa3_tx_pkt_wrapper *tx_pkt); static u32 ipa_adjust_ra_buff_base_sz(u32 aggr_byte_limit); static void ipa3_wq_write_done_common(struct ipa3_sys_context *sys, struct ipa3_tx_pkt_wrapper *tx_pkt) { Loading Loading @@ -2701,6 +2711,12 @@ static int ipa3_wan_rx_pyld_hdlr(struct sk_buff *skb, IPAERR("ZLT\n"); goto bail; } if (ipa3_ctx->ipa_client_apps_wan_cons_agg_gro) { sys->ep->client_notify(sys->ep->priv, IPA_RECEIVE, (unsigned long)(skb)); return rc; } /* * payload splits across 2 buff or more, * take the start of the payload from prev_skb Loading Loading @@ -3079,7 +3095,8 @@ static int ipa3_assign_policy(struct ipa_sys_connect_params *in, ipa3_replenish_rx_work_func); INIT_WORK(&sys->repl_work, ipa3_wq_repl_rx); atomic_set(&sys->curr_polling_state, 0); sys->rx_buff_sz = IPA_GENERIC_RX_BUFF_SZ; sys->rx_buff_sz = IPA_GENERIC_RX_BUFF_SZ( IPA_GENERIC_RX_BUFF_BASE_SZ); sys->get_skb = ipa3_get_skb_ipa_rx; sys->free_skb = ipa3_free_skb_rx; in->ipa_ep_cfg.aggr.aggr_en = IPA_ENABLE_AGGR; Loading @@ -3098,6 +3115,10 @@ static int ipa3_assign_policy(struct ipa_sys_connect_params *in, ipa3_recycle_rx_wrapper; sys->rx_pool_sz = IPA_GENERIC_RX_POOL_SZ; in->ipa_ep_cfg.aggr.aggr_byte_limit = IPA_GENERIC_AGGR_BYTE_LIMIT; in->ipa_ep_cfg.aggr.aggr_pkt_limit = IPA_GENERIC_AGGR_PKT_LIMIT; } else if (in->client == IPA_CLIENT_APPS_WAN_CONS) { sys->pyld_hdlr = ipa3_wan_rx_pyld_hdlr; Loading @@ -3112,6 +3133,48 @@ static int ipa3_assign_policy(struct ipa_sys_connect_params *in, ipa3_ctx->wan_rx_ring_size; in->ipa_ep_cfg.aggr.aggr_sw_eof_active = true; if (ipa3_ctx-> ipa_client_apps_wan_cons_agg_gro) { IPAERR("get close-by %u\n", ipa_adjust_ra_buff_base_sz( in->ipa_ep_cfg.aggr. aggr_byte_limit)); IPAERR("set rx_buff_sz %lu\n", (unsigned long int) IPA_GENERIC_RX_BUFF_SZ( ipa_adjust_ra_buff_base_sz( in->ipa_ep_cfg. aggr.aggr_byte_limit))); /* disable ipa_status */ sys->ep->status. status_en = false; sys->rx_buff_sz = IPA_GENERIC_RX_BUFF_SZ( ipa_adjust_ra_buff_base_sz( in->ipa_ep_cfg.aggr. aggr_byte_limit)); in->ipa_ep_cfg.aggr. aggr_byte_limit = sys->rx_buff_sz < in-> ipa_ep_cfg.aggr. aggr_byte_limit ? IPA_ADJUST_AGGR_BYTE_LIMIT( sys->rx_buff_sz) : IPA_ADJUST_AGGR_BYTE_LIMIT( in->ipa_ep_cfg. aggr.aggr_byte_limit); IPAERR("set aggr_limit %lu\n", (unsigned long int) in->ipa_ep_cfg.aggr. aggr_byte_limit); } else { in->ipa_ep_cfg.aggr. aggr_byte_limit = IPA_GENERIC_AGGR_BYTE_LIMIT; in->ipa_ep_cfg.aggr. aggr_pkt_limit = IPA_GENERIC_AGGR_PKT_LIMIT; } } } else if (IPA_CLIENT_IS_WLAN_CONS(in->client)) { IPADBG("assigning policy to client:%d", Loading Loading @@ -4064,3 +4127,23 @@ int ipa_gsi_ch20_wa(void) /* DMA memory shall not be freed as it is used by channel 20 */ return 0; } /** * ipa_adjust_ra_buff_base_sz() * * Return value: the largest power of two which is smaller * than the input value */ static u32 ipa_adjust_ra_buff_base_sz(u32 aggr_byte_limit) { aggr_byte_limit += IPA_MTU; aggr_byte_limit += IPA_GENERIC_RX_BUFF_LIMIT; aggr_byte_limit--; aggr_byte_limit |= aggr_byte_limit >> 1; aggr_byte_limit |= aggr_byte_limit >> 2; aggr_byte_limit |= aggr_byte_limit >> 4; aggr_byte_limit |= aggr_byte_limit >> 8; aggr_byte_limit |= aggr_byte_limit >> 16; aggr_byte_limit++; return aggr_byte_limit >> 1; } drivers/platform/msm/ipa/ipa_v3/ipa_i.h +1 −0 Original line number Diff line number Diff line Loading @@ -1418,6 +1418,7 @@ struct ipa3_ready_cb_info { * @uc_wdi_ctx: WDI specific fields for uC interface * @ipa_num_pipes: The number of pipes used by IPA HW * @skip_uc_pipe_reset: Indicates whether pipe reset via uC needs to be avoided * @ipa_client_apps_wan_cons_agg_gro: RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA * @apply_rg10_wa: Indicates whether to use register group 10 workaround * @gsi_ch20_wa: Indicates whether to apply GSI physical channel 20 workaround * @w_lock: Indicates the wakeup source. Loading drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +7 −0 Original line number Diff line number Diff line Loading @@ -45,6 +45,13 @@ #define IPA_EOT_COAL_GRAN_MIN (1) #define IPA_EOT_COAL_GRAN_MAX (16) #define IPA_AGGR_BYTE_LIMIT (\ IPA_ENDP_INIT_AGGR_N_AGGR_BYTE_LIMIT_BMSK >> \ IPA_ENDP_INIT_AGGR_N_AGGR_BYTE_LIMIT_SHFT) #define IPA_AGGR_PKT_LIMIT (\ IPA_ENDP_INIT_AGGR_n_AGGR_PKT_LIMIT_BMSK >> \ IPA_ENDP_INIT_AGGR_n_AGGR_PKT_LIMIT_SHFT) /* In IPAv3 only endpoints 0-3 can be configured to deaggregation */ #define IPA_EP_SUPPORTS_DEAGGR(idx) ((idx) >= 0 && (idx) <= 3) Loading drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c +23 −0 Original line number Diff line number Diff line Loading @@ -1544,6 +1544,29 @@ static int ipa3_wwan_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) ipa_ep_cfg.cfg.cs_offload_en = IPA_ENABLE_CS_OFFLOAD_DL; if ((extend_ioctl_data.u.data) & RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA) { IPAWANERR("get AGG size %d count %d\n", extend_ioctl_data.u. ingress_format.agg_size, extend_ioctl_data.u. ingress_format.agg_count); if (!ipa_disable_apps_wan_cons_deaggr( extend_ioctl_data.u. ingress_format.agg_size, extend_ioctl_data. u.ingress_format.agg_count)) { rmnet_ipa3_ctx->ipa_to_apps_ep_cfg. ipa_ep_cfg.aggr.aggr_byte_limit = extend_ioctl_data.u.ingress_format. agg_size; rmnet_ipa3_ctx->ipa_to_apps_ep_cfg. ipa_ep_cfg.aggr.aggr_pkt_limit = extend_ioctl_data.u.ingress_format. agg_count; } } rmnet_ipa3_ctx->ipa_to_apps_ep_cfg.ipa_ep_cfg.hdr. hdr_len = 4; rmnet_ipa3_ctx->ipa_to_apps_ep_cfg.ipa_ep_cfg.hdr. Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa_dp.c +88 −5 Original line number Diff line number Diff line Loading @@ -28,16 +28,24 @@ #define POLLING_MIN_SLEEP_TX 400 #define POLLING_MAX_SLEEP_TX 500 /* 8K less 1 nominal MTU (1500 bytes) rounded to units of KB */ #define IPA_MTU 1500 #define IPA_GENERIC_AGGR_BYTE_LIMIT 6 #define IPA_GENERIC_AGGR_TIME_LIMIT 1 #define IPA_GENERIC_AGGR_PKT_LIMIT 0 #define IPA_GENERIC_RX_BUFF_BASE_SZ 8192 #define IPA_REAL_GENERIC_RX_BUFF_SZ (SKB_DATA_ALIGN(\ IPA_GENERIC_RX_BUFF_BASE_SZ + NET_SKB_PAD) +\ #define IPA_REAL_GENERIC_RX_BUFF_SZ(X) (SKB_DATA_ALIGN(\ (X) + NET_SKB_PAD) +\ SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) #define IPA_GENERIC_RX_BUFF_SZ (IPA_GENERIC_RX_BUFF_BASE_SZ -\ (IPA_REAL_GENERIC_RX_BUFF_SZ - IPA_GENERIC_RX_BUFF_BASE_SZ)) #define IPA_GENERIC_RX_BUFF_SZ(X) ((X) -\ (IPA_REAL_GENERIC_RX_BUFF_SZ(X) - (X))) #define IPA_GENERIC_RX_BUFF_LIMIT (\ IPA_REAL_GENERIC_RX_BUFF_SZ(\ IPA_GENERIC_RX_BUFF_BASE_SZ) -\ IPA_GENERIC_RX_BUFF_BASE_SZ) /* less 1 nominal MTU (1500 bytes) rounded to units of KB */ #define IPA_ADJUST_AGGR_BYTE_LIMIT(X) (((X) - IPA_MTU)/1000) #define IPA_RX_BUFF_CLIENT_HEADROOM 256 Loading Loading @@ -90,6 +98,8 @@ static int ipa_handle_rx_core_sps(struct ipa3_sys_context *sys, static unsigned long tag_to_pointer_wa(uint64_t tag); static uint64_t pointer_to_tag_wa(struct ipa3_tx_pkt_wrapper *tx_pkt); static u32 ipa_adjust_ra_buff_base_sz(u32 aggr_byte_limit); static void ipa3_wq_write_done_common(struct ipa3_sys_context *sys, struct ipa3_tx_pkt_wrapper *tx_pkt) { Loading Loading @@ -2701,6 +2711,12 @@ static int ipa3_wan_rx_pyld_hdlr(struct sk_buff *skb, IPAERR("ZLT\n"); goto bail; } if (ipa3_ctx->ipa_client_apps_wan_cons_agg_gro) { sys->ep->client_notify(sys->ep->priv, IPA_RECEIVE, (unsigned long)(skb)); return rc; } /* * payload splits across 2 buff or more, * take the start of the payload from prev_skb Loading Loading @@ -3079,7 +3095,8 @@ static int ipa3_assign_policy(struct ipa_sys_connect_params *in, ipa3_replenish_rx_work_func); INIT_WORK(&sys->repl_work, ipa3_wq_repl_rx); atomic_set(&sys->curr_polling_state, 0); sys->rx_buff_sz = IPA_GENERIC_RX_BUFF_SZ; sys->rx_buff_sz = IPA_GENERIC_RX_BUFF_SZ( IPA_GENERIC_RX_BUFF_BASE_SZ); sys->get_skb = ipa3_get_skb_ipa_rx; sys->free_skb = ipa3_free_skb_rx; in->ipa_ep_cfg.aggr.aggr_en = IPA_ENABLE_AGGR; Loading @@ -3098,6 +3115,10 @@ static int ipa3_assign_policy(struct ipa_sys_connect_params *in, ipa3_recycle_rx_wrapper; sys->rx_pool_sz = IPA_GENERIC_RX_POOL_SZ; in->ipa_ep_cfg.aggr.aggr_byte_limit = IPA_GENERIC_AGGR_BYTE_LIMIT; in->ipa_ep_cfg.aggr.aggr_pkt_limit = IPA_GENERIC_AGGR_PKT_LIMIT; } else if (in->client == IPA_CLIENT_APPS_WAN_CONS) { sys->pyld_hdlr = ipa3_wan_rx_pyld_hdlr; Loading @@ -3112,6 +3133,48 @@ static int ipa3_assign_policy(struct ipa_sys_connect_params *in, ipa3_ctx->wan_rx_ring_size; in->ipa_ep_cfg.aggr.aggr_sw_eof_active = true; if (ipa3_ctx-> ipa_client_apps_wan_cons_agg_gro) { IPAERR("get close-by %u\n", ipa_adjust_ra_buff_base_sz( in->ipa_ep_cfg.aggr. aggr_byte_limit)); IPAERR("set rx_buff_sz %lu\n", (unsigned long int) IPA_GENERIC_RX_BUFF_SZ( ipa_adjust_ra_buff_base_sz( in->ipa_ep_cfg. aggr.aggr_byte_limit))); /* disable ipa_status */ sys->ep->status. status_en = false; sys->rx_buff_sz = IPA_GENERIC_RX_BUFF_SZ( ipa_adjust_ra_buff_base_sz( in->ipa_ep_cfg.aggr. aggr_byte_limit)); in->ipa_ep_cfg.aggr. aggr_byte_limit = sys->rx_buff_sz < in-> ipa_ep_cfg.aggr. aggr_byte_limit ? IPA_ADJUST_AGGR_BYTE_LIMIT( sys->rx_buff_sz) : IPA_ADJUST_AGGR_BYTE_LIMIT( in->ipa_ep_cfg. aggr.aggr_byte_limit); IPAERR("set aggr_limit %lu\n", (unsigned long int) in->ipa_ep_cfg.aggr. aggr_byte_limit); } else { in->ipa_ep_cfg.aggr. aggr_byte_limit = IPA_GENERIC_AGGR_BYTE_LIMIT; in->ipa_ep_cfg.aggr. aggr_pkt_limit = IPA_GENERIC_AGGR_PKT_LIMIT; } } } else if (IPA_CLIENT_IS_WLAN_CONS(in->client)) { IPADBG("assigning policy to client:%d", Loading Loading @@ -4064,3 +4127,23 @@ int ipa_gsi_ch20_wa(void) /* DMA memory shall not be freed as it is used by channel 20 */ return 0; } /** * ipa_adjust_ra_buff_base_sz() * * Return value: the largest power of two which is smaller * than the input value */ static u32 ipa_adjust_ra_buff_base_sz(u32 aggr_byte_limit) { aggr_byte_limit += IPA_MTU; aggr_byte_limit += IPA_GENERIC_RX_BUFF_LIMIT; aggr_byte_limit--; aggr_byte_limit |= aggr_byte_limit >> 1; aggr_byte_limit |= aggr_byte_limit >> 2; aggr_byte_limit |= aggr_byte_limit >> 4; aggr_byte_limit |= aggr_byte_limit >> 8; aggr_byte_limit |= aggr_byte_limit >> 16; aggr_byte_limit++; return aggr_byte_limit >> 1; }
drivers/platform/msm/ipa/ipa_v3/ipa_i.h +1 −0 Original line number Diff line number Diff line Loading @@ -1418,6 +1418,7 @@ struct ipa3_ready_cb_info { * @uc_wdi_ctx: WDI specific fields for uC interface * @ipa_num_pipes: The number of pipes used by IPA HW * @skip_uc_pipe_reset: Indicates whether pipe reset via uC needs to be avoided * @ipa_client_apps_wan_cons_agg_gro: RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA * @apply_rg10_wa: Indicates whether to use register group 10 workaround * @gsi_ch20_wa: Indicates whether to apply GSI physical channel 20 workaround * @w_lock: Indicates the wakeup source. Loading
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +7 −0 Original line number Diff line number Diff line Loading @@ -45,6 +45,13 @@ #define IPA_EOT_COAL_GRAN_MIN (1) #define IPA_EOT_COAL_GRAN_MAX (16) #define IPA_AGGR_BYTE_LIMIT (\ IPA_ENDP_INIT_AGGR_N_AGGR_BYTE_LIMIT_BMSK >> \ IPA_ENDP_INIT_AGGR_N_AGGR_BYTE_LIMIT_SHFT) #define IPA_AGGR_PKT_LIMIT (\ IPA_ENDP_INIT_AGGR_n_AGGR_PKT_LIMIT_BMSK >> \ IPA_ENDP_INIT_AGGR_n_AGGR_PKT_LIMIT_SHFT) /* In IPAv3 only endpoints 0-3 can be configured to deaggregation */ #define IPA_EP_SUPPORTS_DEAGGR(idx) ((idx) >= 0 && (idx) <= 3) Loading
drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c +23 −0 Original line number Diff line number Diff line Loading @@ -1544,6 +1544,29 @@ static int ipa3_wwan_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) ipa_ep_cfg.cfg.cs_offload_en = IPA_ENABLE_CS_OFFLOAD_DL; if ((extend_ioctl_data.u.data) & RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA) { IPAWANERR("get AGG size %d count %d\n", extend_ioctl_data.u. ingress_format.agg_size, extend_ioctl_data.u. ingress_format.agg_count); if (!ipa_disable_apps_wan_cons_deaggr( extend_ioctl_data.u. ingress_format.agg_size, extend_ioctl_data. u.ingress_format.agg_count)) { rmnet_ipa3_ctx->ipa_to_apps_ep_cfg. ipa_ep_cfg.aggr.aggr_byte_limit = extend_ioctl_data.u.ingress_format. agg_size; rmnet_ipa3_ctx->ipa_to_apps_ep_cfg. ipa_ep_cfg.aggr.aggr_pkt_limit = extend_ioctl_data.u.ingress_format. agg_count; } } rmnet_ipa3_ctx->ipa_to_apps_ep_cfg.ipa_ep_cfg.hdr. hdr_len = 4; rmnet_ipa3_ctx->ipa_to_apps_ep_cfg.ipa_ep_cfg.hdr. Loading