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Commit 3ec18cd8 authored Aug 20, 2012 by Stephane Eranian Committed by Ingo Molnar Sep 04, 2012

perf/x86: Enable Intel Cedarview Atom suppport



This patch enables perf_events support for Intel Cedarview
Atom (model 54) processors. Support includes PEBS and LBR.
Tested on my Atom N2600 netbook.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20120820092421.GA11284@quad


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent a6fa941d

arch/x86/kernel/cpu/perf_event_intel.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -2008,6 +2008,7 @@ __init int intel_pmu_init(void)
		break;

		case 28: /* Atom */
		case 54: /* Cedariew */
		memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
		sizeof(hw_cache_event_ids));

arch/x86/kernel/cpu/perf_event_intel_lbr.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -686,7 +686,8 @@ void intel_pmu_lbr_init_atom(void)
		* to have an operational LBR which can freeze
		* on PMU interrupt
		*/
		if (boot_cpu_data.x86_mask < 10) {
		if (boot_cpu_data.x86_model == 28
		&& boot_cpu_data.x86_mask < 10) {
		pr_cont("LBR disabled due to erratum");
		return;
		}