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Commit 3e68320e authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915: Preserve the FDI line reversal override bit on CPT 



The FDI link has supported link reversal to make the PCB layout
engineer's life easier for quite a while and we have always presered
this bit as we programmed FDI_RX_CTL with a read/modify/write sequence.

We're trying to take a bit more control over what the BIOS leaves in
various register and with the introduction of DDI, started to program
FDI_RX_CTL fully.

There's a fused bit to indicate DMI link reversal and FDI defaults to
mirroring that configuration. We have a bit to override that behaviour
that we need to preserve from the BIOS.

Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fdfa175d

drivers/gpu/drm/i915/i915_drv.h

+1 −1
Original line number Diff line number Diff line
@@ -1040,7 +1040,7 @@ typedef struct drm_i915_private { 
	bool hw_contexts_disabled;

	uint32_t hw_context_size;



	bool fdi_rx_polarity_reversed;

	u32 fdi_rx_config;



	struct i915_suspend_saved_registers regfile;

drivers/gpu/drm/i915/i915_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -3911,7 +3911,7 @@ 
#define  FDI_10BPC                      (1<<16)

#define  FDI_6BPC                       (2<<16)

#define  FDI_12BPC                      (3<<16)

#define  FDI_LINK_REVERSE_OVERWRITE     (1<<15)

#define  FDI_RX_LINK_REVERSAL_OVERRIDE  (1<<15)

#define  FDI_DMI_LINK_REVERSE_MASK      (1<<14)

#define  FDI_RX_PLL_ENABLE              (1<<13)

#define  FDI_FS_ERR_CORRECT_ENABLE      (1<<11)

drivers/gpu/drm/i915/intel_crt.c

+9 −5
Original line number Diff line number Diff line
@@ -801,10 +801,14 @@ void intel_crt_init(struct drm_device *dev) 
	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;



	/*

	 * TODO: find a proper way to discover whether we need to set the

	 * polarity reversal bit or not, instead of relying on the BIOS.

	 * TODO: find a proper way to discover whether we need to set the the

	 * polarity and link reversal bits or not, instead of relying on the

	 * BIOS.

	 */

	if (HAS_PCH_LPT(dev))

		dev_priv->fdi_rx_polarity_reversed =

		     !!(I915_READ(_FDI_RXA_CTL) & FDI_RX_POLARITY_REVERSED_LPT);

	if (HAS_PCH_LPT(dev)) {

		u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |

				 FDI_RX_LINK_REVERSAL_OVERRIDE;



		dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;

	}

}

drivers/gpu/drm/i915/intel_ddi.c

+2 −4
Original line number Diff line number Diff line
@@ -180,10 +180,8 @@ void hsw_fdi_link_train(struct drm_crtc *crtc) 
				  FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90);



	/* Enable the PCH Receiver FDI PLL */

	rx_ctl_val = FDI_RX_PLL_ENABLE | FDI_RX_ENHANCE_FRAME_ENABLE |

		     ((intel_crtc->fdi_lanes - 1) << 19);

	if (dev_priv->fdi_rx_polarity_reversed)

		rx_ctl_val |= FDI_RX_POLARITY_REVERSED_LPT;

	rx_ctl_val = dev_priv->fdi_rx_config | FDI_RX_ENHANCE_FRAME_ENABLE |

		     FDI_RX_PLL_ENABLE | ((intel_crtc->fdi_lanes - 1) << 19);

	I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);

	POSTING_READ(_FDI_RXA_CTL);

	udelay(220);