Loading drivers/power/qpnp-smbcharger.c +54 −2 Original line number Diff line number Diff line Loading @@ -279,6 +279,7 @@ enum smbchg_wa { SMBCHG_AICL_DEGLITCH_WA = BIT(0), SMBCHG_HVDCP_9V_EN_WA = BIT(1), SMBCHG_USB100_WA = BIT(2), SMBCHG_BATT_OV_WA = BIT(3), }; enum print_reason { Loading Loading @@ -5947,7 +5948,6 @@ static inline int get_bpd(const char *name) #define RECHG_THRESHOLD_SRC_BIT BIT(1) #define TERM_I_SRC_BIT BIT(2) #define TERM_SRC_FG BIT(2) #define CHGR_CFG2 0xFC #define CHG_INHIB_CFG_REG 0xF7 #define CHG_INHIBIT_50MV_VAL 0x00 #define CHG_INHIBIT_100MV_VAL 0x01 Loading @@ -5955,9 +5955,11 @@ static inline int get_bpd(const char *name) #define CHG_INHIBIT_300MV_VAL 0x03 #define CHG_INHIBIT_MASK 0x03 #define USE_REGISTER_FOR_CURRENT BIT(2) #define CHGR_CFG2 0xFC #define CHG_EN_SRC_BIT BIT(7) #define CHG_EN_POLARITY_BIT BIT(6) #define P2F_CHG_TRAN BIT(5) #define CHG_BAT_OV_ECC BIT(4) #define I_TERM_BIT BIT(3) #define AUTO_RECHG_BIT BIT(2) #define CHARGER_INHIBIT_BIT BIT(0) Loading Loading @@ -5999,6 +6001,51 @@ static inline int get_bpd(const char *name) #define APSD_RERUN_BIT BIT(0) #define OTG_OC_CFG 0xF1 #define HICCUP_ENABLED_BIT BIT(6) static void batt_ov_wa_check(struct smbchg_chip *chip) { int rc; u8 reg; /* disable-'battery OV disables charging' feature */ rc = smbchg_sec_masked_write(chip, chip->chgr_base + CHGR_CFG2, CHG_BAT_OV_ECC, 0); if (rc < 0) { dev_err(chip->dev, "Couldn't set chgr_cfg2 rc=%d\n", rc); return; } /* * if battery OV is set: * restart charging by disable/enable charging */ rc = smbchg_read(chip, ®, chip->bat_if_base + RT_STS, 1); if (rc < 0) { dev_err(chip->dev, "Couldn't read Battery RT status rc = %d\n", rc); return; } if (reg & BAT_OV_BIT) { rc = smbchg_charging_en(chip, false); if (rc < 0) { dev_err(chip->dev, "Couldn't disable charging: rc = %d\n", rc); return; } /* delay for charging-disable to take affect */ msleep(200); rc = smbchg_charging_en(chip, true); if (rc < 0) { dev_err(chip->dev, "Couldn't enable charging: rc = %d\n", rc); return; } } } static int smbchg_hw_init(struct smbchg_chip *chip) { int rc, i; Loading Loading @@ -6364,6 +6411,9 @@ static int smbchg_hw_init(struct smbchg_chip *chip) rc); } if (chip->wa_flags & SMBCHG_BATT_OV_WA) batt_ov_wa_check(chip); return rc; } Loading Loading @@ -7017,11 +7067,13 @@ static int smbchg_check_chg_version(struct smbchg_chip *chip) switch (pmic_rev_id->pmic_subtype) { case PMI8994: chip->wa_flags |= SMBCHG_AICL_DEGLITCH_WA; chip->wa_flags |= SMBCHG_AICL_DEGLITCH_WA | SMBCHG_BATT_OV_WA; use_pmi8994_tables(chip); chip->schg_version = QPNP_SCHG; break; case PMI8950: chip->wa_flags |= SMBCHG_BATT_OV_WA; if (pmic_rev_id->rev4 < 2) /* PMI8950 1.0 */ { chip->wa_flags |= SMBCHG_AICL_DEGLITCH_WA; } else { /* rev > PMI8950 v1.0 */ Loading Loading
drivers/power/qpnp-smbcharger.c +54 −2 Original line number Diff line number Diff line Loading @@ -279,6 +279,7 @@ enum smbchg_wa { SMBCHG_AICL_DEGLITCH_WA = BIT(0), SMBCHG_HVDCP_9V_EN_WA = BIT(1), SMBCHG_USB100_WA = BIT(2), SMBCHG_BATT_OV_WA = BIT(3), }; enum print_reason { Loading Loading @@ -5947,7 +5948,6 @@ static inline int get_bpd(const char *name) #define RECHG_THRESHOLD_SRC_BIT BIT(1) #define TERM_I_SRC_BIT BIT(2) #define TERM_SRC_FG BIT(2) #define CHGR_CFG2 0xFC #define CHG_INHIB_CFG_REG 0xF7 #define CHG_INHIBIT_50MV_VAL 0x00 #define CHG_INHIBIT_100MV_VAL 0x01 Loading @@ -5955,9 +5955,11 @@ static inline int get_bpd(const char *name) #define CHG_INHIBIT_300MV_VAL 0x03 #define CHG_INHIBIT_MASK 0x03 #define USE_REGISTER_FOR_CURRENT BIT(2) #define CHGR_CFG2 0xFC #define CHG_EN_SRC_BIT BIT(7) #define CHG_EN_POLARITY_BIT BIT(6) #define P2F_CHG_TRAN BIT(5) #define CHG_BAT_OV_ECC BIT(4) #define I_TERM_BIT BIT(3) #define AUTO_RECHG_BIT BIT(2) #define CHARGER_INHIBIT_BIT BIT(0) Loading Loading @@ -5999,6 +6001,51 @@ static inline int get_bpd(const char *name) #define APSD_RERUN_BIT BIT(0) #define OTG_OC_CFG 0xF1 #define HICCUP_ENABLED_BIT BIT(6) static void batt_ov_wa_check(struct smbchg_chip *chip) { int rc; u8 reg; /* disable-'battery OV disables charging' feature */ rc = smbchg_sec_masked_write(chip, chip->chgr_base + CHGR_CFG2, CHG_BAT_OV_ECC, 0); if (rc < 0) { dev_err(chip->dev, "Couldn't set chgr_cfg2 rc=%d\n", rc); return; } /* * if battery OV is set: * restart charging by disable/enable charging */ rc = smbchg_read(chip, ®, chip->bat_if_base + RT_STS, 1); if (rc < 0) { dev_err(chip->dev, "Couldn't read Battery RT status rc = %d\n", rc); return; } if (reg & BAT_OV_BIT) { rc = smbchg_charging_en(chip, false); if (rc < 0) { dev_err(chip->dev, "Couldn't disable charging: rc = %d\n", rc); return; } /* delay for charging-disable to take affect */ msleep(200); rc = smbchg_charging_en(chip, true); if (rc < 0) { dev_err(chip->dev, "Couldn't enable charging: rc = %d\n", rc); return; } } } static int smbchg_hw_init(struct smbchg_chip *chip) { int rc, i; Loading Loading @@ -6364,6 +6411,9 @@ static int smbchg_hw_init(struct smbchg_chip *chip) rc); } if (chip->wa_flags & SMBCHG_BATT_OV_WA) batt_ov_wa_check(chip); return rc; } Loading Loading @@ -7017,11 +7067,13 @@ static int smbchg_check_chg_version(struct smbchg_chip *chip) switch (pmic_rev_id->pmic_subtype) { case PMI8994: chip->wa_flags |= SMBCHG_AICL_DEGLITCH_WA; chip->wa_flags |= SMBCHG_AICL_DEGLITCH_WA | SMBCHG_BATT_OV_WA; use_pmi8994_tables(chip); chip->schg_version = QPNP_SCHG; break; case PMI8950: chip->wa_flags |= SMBCHG_BATT_OV_WA; if (pmic_rev_id->rev4 < 2) /* PMI8950 1.0 */ { chip->wa_flags |= SMBCHG_AICL_DEGLITCH_WA; } else { /* rev > PMI8950 v1.0 */ Loading