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Commit 3c904bfa authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "clk: msm: mdmfermium: Add support for qdss_dap clock"

parents c5473d55 844493d4

drivers/clk/msm/clock-gcc-mdmfermium.c

+14 −0
Original line number Diff line number Diff line
@@ -934,6 +934,18 @@ static struct local_vote_clk gcc_smmu_cfg_clk = { 
	},

};



static struct local_vote_clk gcc_qdss_dap_clk = {

	.cbcr_reg = QDSS_DAP_CBCR,

	.vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,

	.en_mask = BIT(19),

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_qdss_dap_clk",

		.ops = &clk_ops_vote,

		CLK_INIT(gcc_qdss_dap_clk.c),

	},

};



static struct branch_clk gcc_blsp1_qup1_i2c_apps_clk = {

	.cbcr_reg = BLSP1_QUP1_I2C_APPS_CBCR,

	.has_sibling = 0,
@@ -1606,6 +1618,7 @@ static struct mux_clk gcc_debug_mux = { 
		{ &gcc_gp3_clk.c, 0x0012 },

		{ &gcc_mss_cfg_ahb_clk.c, 0x0030 },

		{ &gcc_mss_q6_bimc_axi_clk.c, 0x0031 },

		{ &gcc_qdss_dap_clk.c, 0x0049 },

		{ &gcc_apss_tcu_clk.c, 0x0050 },

		{ &gcc_smmu_cfg_clk.c, 0x005b },

		{ &gcc_usb_hs_system_clk.c, 0x0060 },
@@ -1707,6 +1720,7 @@ static struct clk_lookup msm_clocks_lookup[] = { 
	 CLK_LIST(gcc_crypto_clk),

	 CLK_LIST(gcc_prng_ahb_clk),

	 CLK_LIST(gcc_apss_tcu_clk),

	 CLK_LIST(gcc_qdss_dap_clk),

	 CLK_LIST(gcc_smmu_cfg_clk),

	 CLK_LIST(apss_ahb_clk_src),

	 CLK_LIST(emac_0_125m_clk_src),

include/dt-bindings/clock/mdm-clocks-fermium.h

+1 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ 
#define clk_gcc_apss_ahb_clk					 0x2b0d39ff

#define clk_gcc_apss_axi_clk					 0x1d47f4ff

#define clk_gcc_prng_ahb_clk					 0x397e7eaa

#define clk_gcc_qdss_dap_clk					 0x7fa9aa73

#define clk_gcc_apss_tcu_clk					 0xaf56a329

#define clk_gcc_blsp1_ahb_clk					 0x8caa5b4f

#define clk_gcc_blsp1_qup1_i2c_apps_clk				 0xc303fae9

include/dt-bindings/clock/mdm-clocks-hwio-fermium.h

+1 −0
Original line number Diff line number Diff line
@@ -107,6 +107,7 @@ 
#define EMAC_0_TX_CBCR				0x4E00C

#define APSS_TCU_CBCR				0x12018

#define SMMU_CFG_CBCR				0x12038

#define QDSS_DAP_CBCR				0x29084

#define APCS_SMMU_CLOCK_BRANCH_ENA_VOTE		0x4500C

#define USB2A_PHY_SLEEP_CBCR			0x4102C

#define USB_HS_PHY_CFG_AHB_CBCR		0x41030