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Commit 3c67aa0f authored by Puneet Mishra's avatar Puneet Mishra
Browse files

ARM: dts: msm: Add nfc device to msmtitanium 



DT changes for nfc are required on msmtitanium describing
the GPIO behavior for the nfc controller chip.

Modified dtsi files on cdp, mtp, and qrd.

Change-Id: I722c9726e4c52926f61d0c482ac36b8d615907d6
Signed-off-by: default avatarPuneet Mishra <puneetm@codeaurora.org>
parent f9fb0d29

arch/arm/boot/dts/qcom/msmtitanium-cdp.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -38,6 +38,26 @@ 
	};

};



&i2c_5 { /* BLSP2 QUP1 (NFC) */

	nq@28 {

		compatible = "qcom,nq-nci";

		reg = <0x28>;

		qcom,nq-irq = <&tlmm 17 0x00>;

		qcom,nq-ven = <&tlmm 16 0x00>;

		qcom,nq-firm = <&tlmm 62 0x00>;

		qcom,nq-clkreq = <&pmtitanium_gpios 2 0x00>;

		interrupt-parent = <&tlmm>;

		qcom,clk-src = "BBCLK2";

		interrupts = <17 0>;

		interrupt-names = "nfc_irq";

		pinctrl-names = "nfc_active", "nfc_suspend";

		pinctrl-0 = <&nfc_int_active &nfc_disable_active>;

		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;

		clocks = <&clock_gcc clk_bb_clk2_pin>;

		clock-names = "ref_clk";

	};

};



&pmtitanium_l10 {

	regulator-max-microvolt = <2850000>;

};
@@ -264,3 +284,17 @@ 
	qcom,typec-psy-name = "typec";

	qcom,otg-pinctrl;

};



&pmtitanium_gpios {

	/* GPIO 2 (NFC_CLK_REQ) */

	gpio@c100 {

		qcom,mode = <0>;

		qcom,output-type = <0>;

		qcom,pull = <0>;

		qcom,vin-sel = <2>;

		qcom,out-strength = <3>;

		qcom,src-sel = <0>;

		qcom,master-en = <1>;

		status = "okay";

	};

};

arch/arm/boot/dts/qcom/msmtitanium-mtp.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -38,6 +38,26 @@ 
	};

};



&i2c_5 { /* BLSP2 QUP1 (NFC) */

	nq@28 {

		compatible = "qcom,nq-nci";

		reg = <0x28>;

		qcom,nq-irq = <&tlmm 17 0x00>;

		qcom,nq-ven = <&tlmm 16 0x00>;

		qcom,nq-firm = <&tlmm 62 0x00>;

		qcom,nq-clkreq = <&pmtitanium_gpios 2 0x00>;

		interrupt-parent = <&tlmm>;

		qcom,clk-src = "BBCLK2";

		interrupts = <17 0>;

		interrupt-names = "nfc_irq";

		pinctrl-names = "nfc_active", "nfc_suspend";

		pinctrl-0 = <&nfc_int_active &nfc_disable_active>;

		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;

		clocks = <&clock_gcc clk_bb_clk2_pin>;

		clock-names = "ref_clk";

	};

};



&pmtitanium_l10 {

	regulator-max-microvolt = <2850000>;

};
@@ -245,3 +265,17 @@ 
	qcom,typec-psy-name = "typec";

	qcom,otg-pinctrl;

};



&pmtitanium_gpios {

	/* GPIO 2 (NFC_CLK_REQ) */

	gpio@c100 {

		qcom,mode = <0>;

		qcom,output-type = <0>;

		qcom,pull = <0>;

		qcom,vin-sel = <2>;

		qcom,out-strength = <3>;

		qcom,src-sel = <0>;

		qcom,master-en = <1>;

		status = "okay";

	};

};

arch/arm/boot/dts/qcom/msmtitanium-pinctrl.dtsi

+37 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -647,6 +647,42 @@ 
			};

		};



		pmx_rd_nfc_int {

			/*qcom,pins = <&gp 17>;*/

			pins = "gpio17";

			qcom,pin-func = <0>;

			qcom,num-grp-pins = <1>;

			label = "pmx_nfc_int";



			nfc_int_active: active {

				drive-strength = <6>;

				bias-pull-up;

			};



			nfc_int_suspend: suspend {

				drive-strength = <6>;

				bias-pull-up;

			};

		};



		pmx_nfc_reset {

			/*qcom,pins = <&gp 16>;*/

			pins = "gpio16";

			qcom,pin-func = <0>;

			qcom,num-grp-pins = <1>;

			label = "pmx_nfc_disable";



			nfc_disable_active: active {

				drive-strength = <6>;

				bias-pull-up;

			};



			nfc_disable_suspend: suspend {

				drive-strength = <6>;

				bias-disable;

			};

		};



		wcnss_pmux_5wire {

			/* Active configuration of bus pins */

			wcnss_default: wcnss_default {

arch/arm/boot/dts/qcom/msmtitanium-qrd.dtsi

+35 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -102,3 +102,37 @@ 


	status = "ok";

};



&i2c_5 { /* BLSP2 QUP1 (NFC) */

	nq@28 {

		compatible = "qcom,nq-nci";

		reg = <0x28>;

		qcom,nq-irq = <&tlmm 17 0x00>;

		qcom,nq-ven = <&tlmm 16 0x00>;

		qcom,nq-firm = <&tlmm 62 0x00>;

		qcom,nq-clkreq = <&pmtitanium_gpios 2 0x00>;

		interrupt-parent = <&tlmm>;

		qcom,clk-src = "BBCLK2";

		interrupts = <17 0>;

		interrupt-names = "nfc_irq";

		pinctrl-names = "nfc_active", "nfc_suspend";

		pinctrl-0 = <&nfc_int_active &nfc_disable_active>;

		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;

		clocks = <&clock_gcc clk_bb_clk2_pin>;

		clock-names = "ref_clk";

	};

};



&pmtitanium_gpios {

	/* GPIO 2 (NFC_CLK_REQ) */

	gpio@c100 {

		qcom,mode = <0>;

		qcom,output-type = <0>;

		qcom,pull = <0>;

		qcom,vin-sel = <2>;

		qcom,out-strength = <3>;

		qcom,src-sel = <0>;

		qcom,master-en = <1>;

		status = "okay";

	};

};