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Commit 3aae7ab0 authored by Santosh Shilimkar's avatar Santosh Shilimkar Committed by Arnd Bergmann
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ARM: keystone: Move CPU bringup code to dedicated asm file 



Because of inline asm usage in platsmp.c, smc instruction
creates build failure for ARM V6+V7 build where as using instruction
encoding for smc breaks the thumb2 build.

So move the code snippet to separate asm file and mark
it with 'armv7-a$(plus_sec)' to avoid any build issues.

Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 24e860fb

arch/arm/mach-keystone/Makefile

+5 −1
Original line number Diff line number Diff line 
obj-y					:= keystone.o

obj-y					:= keystone.o smc.o



plus_sec := $(call as-instr,.arch_extension sec,+sec)

AFLAGS_smc.o				:=-Wa,-march=armv7-a$(plus_sec)



obj-$(CONFIG_SMP)			+= platsmp.o

arch/arm/mach-keystone/keystone.h

+6 −0
Original line number Diff line number Diff line
@@ -11,7 +11,13 @@ 
#ifndef __KEYSTONE_H__

#define __KEYSTONE_H__



#define KEYSTONE_MON_CPU_UP_IDX		0x00



#ifndef __ASSEMBLER__



extern struct smp_operations keystone_smp_ops;

extern void secondary_startup(void);

extern u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr);



#endif /* __ASSEMBLER__ */

#endif /* __KEYSTONE_H__ */

arch/arm/mach-keystone/platsmp.c

+3 −12
Original line number Diff line number Diff line
@@ -30,18 +30,9 @@ static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, 
	pr_debug("keystone-smp: booting cpu %d, vector %08lx\n",

		 cpu, start);



	asm volatile (

		"mov    r0, #0\n"	/* power on cmd	*/

		"mov    r1, %1\n"	/* cpu		*/

		"mov    r2, %2\n"	/* start	*/

		".inst  0xe1600070\n"	/* smc #0	*/

		"mov    %0, r0\n"

		: "=r" (error)

		: "r"(cpu), "r"(start)

		: "cc", "r0", "r1", "r2", "memory"

	);



	pr_debug("keystone-smp: monitor returned %d\n", error);

	error = keystone_cpu_smc(KEYSTONE_MON_CPU_UP_IDX, cpu, start);

	if (error)

		pr_err("CPU %d bringup failed with %d\n", cpu, error);



	return error;

}

arch/arm/mach-keystone/smc.S

0 → 100644
+29 −0
Original line number Diff line number Diff line 
/*

 * Keystone Secure APIs

 *

 * Copyright (C) 2013 Texas Instruments, Inc.

 * 	Santosh Shilimkar <santosh.shilimkar@ti.com>

 *

 * This program is free software,you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <linux/linkage.h>



/**

 * u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr)

 *

 * Low level CPU monitor API

 * @command:	Monitor command.

 * @cpu:	CPU Number

 * @addr:	Kernel jump address for boot CPU

 *

 * Return: Non zero value on failure

 */

ENTRY(keystone_cpu_smc)

	stmfd   sp!, {r4-r12, lr}

	smc	#0

	dsb

	ldmfd   sp!, {r4-r12, pc}

ENDPROC(keystone_cpu_smc)