Loading arch/powerpc/platforms/powermac/pci.c +3 −3 Original line number Diff line number Diff line Loading @@ -608,7 +608,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) static int __init setup_uninorth(struct pci_controller* hose, struct reg_property* addr) { pci_assign_all_busses = 1; pci_assign_all_buses = 1; has_uninorth = 1; hose->ops = ¯isc_pci_ops; hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000); Loading Loading @@ -640,7 +640,7 @@ static void __init setup_u3_agp(struct pci_controller* hose) { /* On G5, we move AGP up to high bus number so we don't need * to reassign bus numbers for HT. If we ever have P2P bridges * on AGP, we'll have to move pci_assign_all_busses to the * on AGP, we'll have to move pci_assign_all_buses to the * pci_controller structure so we enable it for AGP and not for * HT childs. * We hard code the address because of the different size of Loading Loading @@ -1007,7 +1007,7 @@ void __init pmac_find_bridges(void) * some offset between bus number and domains for now when we * assign all busses should help for now */ if (pci_assign_all_busses) if (pci_assign_all_buses) pcibios_assign_bus_offset = 0x10; } Loading arch/ppc/kernel/pci.c +5 −5 Original line number Diff line number Diff line Loading @@ -54,7 +54,7 @@ static u8* pci_to_OF_bus_map; /* By default, we don't re-assign bus numbers. We do this only on * some pmacs */ int pci_assign_all_busses; int pci_assign_all_buses; struct pci_controller* hose_head; struct pci_controller** hose_tail = &hose_head; Loading Loading @@ -827,7 +827,7 @@ EXPORT_SYMBOL(pci_device_to_OF_node); * PCI bus numbers have not yet been assigned, and you need to * issue PCI config cycles to an OF device. * It could also be used to "fix" RTAS config cycles if you want * to set pci_assign_all_busses to 1 and still use RTAS for PCI * to set pci_assign_all_buses to 1 and still use RTAS for PCI * config cycles. */ struct pci_controller* Loading Loading @@ -1270,12 +1270,12 @@ pcibios_init(void) /* Scan all of the recorded PCI controllers. */ for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { if (pci_assign_all_busses) if (pci_assign_all_buses) hose->first_busno = next_busno; hose->last_busno = 0xff; bus = pci_scan_bus(hose->first_busno, hose->ops, hose); hose->last_busno = bus->subordinate; if (pci_assign_all_busses || next_busno <= hose->last_busno) if (pci_assign_all_buses || next_busno <= hose->last_busno) next_busno = hose->last_busno + pcibios_assign_bus_offset; } pci_bus_count = next_busno; Loading @@ -1284,7 +1284,7 @@ pcibios_init(void) * numbers vs. kernel bus numbers since we may have to * remap them. */ if (pci_assign_all_busses && have_of) if (pci_assign_all_buses && have_of) pcibios_make_OF_bus_map(); /* Do machine dependent PCI interrupt routing */ Loading arch/ppc/platforms/chrp_pci.c +1 −1 Original line number Diff line number Diff line Loading @@ -203,7 +203,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d printk ("RTAS supporting Pegasos OF not found, please upgrade" " your firmware\n"); } pci_assign_all_busses = 1; pci_assign_all_buses = 1; } void __init Loading arch/ppc/platforms/pmac_pci.c +3 −3 Original line number Diff line number Diff line Loading @@ -575,7 +575,7 @@ pmac_find_bridges(void) * some offset between bus number and domains for now when we * assign all busses should help for now */ if (pci_assign_all_busses) if (pci_assign_all_buses) pcibios_assign_bus_offset = 0x10; #ifdef CONFIG_POWER4 Loading Loading @@ -643,7 +643,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) static int __init setup_uninorth(struct pci_controller* hose, struct reg_property* addr) { pci_assign_all_busses = 1; pci_assign_all_buses = 1; has_uninorth = 1; hose->ops = ¯isc_pci_ops; hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000); Loading Loading @@ -677,7 +677,7 @@ setup_u3_agp(struct pci_controller* hose, struct reg_property* addr) { /* On G5, we move AGP up to high bus number so we don't need * to reassign bus numbers for HT. If we ever have P2P bridges * on AGP, we'll have to move pci_assign_all_busses to the * on AGP, we'll have to move pci_assign_all_buses to the * pci_controller structure so we enable it for AGP and not for * HT childs. * We hard code the address because of the different size of Loading arch/ppc/syslib/m82xx_pci.c +1 −1 Original line number Diff line number Diff line Loading @@ -302,7 +302,7 @@ pq2ads_setup_pci(struct pci_controller *hose) void __init pq2_find_bridges(void) { extern int pci_assign_all_busses; extern int pci_assign_all_buses; struct pci_controller * hose; int host_bridge; Loading Loading
arch/powerpc/platforms/powermac/pci.c +3 −3 Original line number Diff line number Diff line Loading @@ -608,7 +608,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) static int __init setup_uninorth(struct pci_controller* hose, struct reg_property* addr) { pci_assign_all_busses = 1; pci_assign_all_buses = 1; has_uninorth = 1; hose->ops = ¯isc_pci_ops; hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000); Loading Loading @@ -640,7 +640,7 @@ static void __init setup_u3_agp(struct pci_controller* hose) { /* On G5, we move AGP up to high bus number so we don't need * to reassign bus numbers for HT. If we ever have P2P bridges * on AGP, we'll have to move pci_assign_all_busses to the * on AGP, we'll have to move pci_assign_all_buses to the * pci_controller structure so we enable it for AGP and not for * HT childs. * We hard code the address because of the different size of Loading Loading @@ -1007,7 +1007,7 @@ void __init pmac_find_bridges(void) * some offset between bus number and domains for now when we * assign all busses should help for now */ if (pci_assign_all_busses) if (pci_assign_all_buses) pcibios_assign_bus_offset = 0x10; } Loading
arch/ppc/kernel/pci.c +5 −5 Original line number Diff line number Diff line Loading @@ -54,7 +54,7 @@ static u8* pci_to_OF_bus_map; /* By default, we don't re-assign bus numbers. We do this only on * some pmacs */ int pci_assign_all_busses; int pci_assign_all_buses; struct pci_controller* hose_head; struct pci_controller** hose_tail = &hose_head; Loading Loading @@ -827,7 +827,7 @@ EXPORT_SYMBOL(pci_device_to_OF_node); * PCI bus numbers have not yet been assigned, and you need to * issue PCI config cycles to an OF device. * It could also be used to "fix" RTAS config cycles if you want * to set pci_assign_all_busses to 1 and still use RTAS for PCI * to set pci_assign_all_buses to 1 and still use RTAS for PCI * config cycles. */ struct pci_controller* Loading Loading @@ -1270,12 +1270,12 @@ pcibios_init(void) /* Scan all of the recorded PCI controllers. */ for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { if (pci_assign_all_busses) if (pci_assign_all_buses) hose->first_busno = next_busno; hose->last_busno = 0xff; bus = pci_scan_bus(hose->first_busno, hose->ops, hose); hose->last_busno = bus->subordinate; if (pci_assign_all_busses || next_busno <= hose->last_busno) if (pci_assign_all_buses || next_busno <= hose->last_busno) next_busno = hose->last_busno + pcibios_assign_bus_offset; } pci_bus_count = next_busno; Loading @@ -1284,7 +1284,7 @@ pcibios_init(void) * numbers vs. kernel bus numbers since we may have to * remap them. */ if (pci_assign_all_busses && have_of) if (pci_assign_all_buses && have_of) pcibios_make_OF_bus_map(); /* Do machine dependent PCI interrupt routing */ Loading
arch/ppc/platforms/chrp_pci.c +1 −1 Original line number Diff line number Diff line Loading @@ -203,7 +203,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d printk ("RTAS supporting Pegasos OF not found, please upgrade" " your firmware\n"); } pci_assign_all_busses = 1; pci_assign_all_buses = 1; } void __init Loading
arch/ppc/platforms/pmac_pci.c +3 −3 Original line number Diff line number Diff line Loading @@ -575,7 +575,7 @@ pmac_find_bridges(void) * some offset between bus number and domains for now when we * assign all busses should help for now */ if (pci_assign_all_busses) if (pci_assign_all_buses) pcibios_assign_bus_offset = 0x10; #ifdef CONFIG_POWER4 Loading Loading @@ -643,7 +643,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) static int __init setup_uninorth(struct pci_controller* hose, struct reg_property* addr) { pci_assign_all_busses = 1; pci_assign_all_buses = 1; has_uninorth = 1; hose->ops = ¯isc_pci_ops; hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000); Loading Loading @@ -677,7 +677,7 @@ setup_u3_agp(struct pci_controller* hose, struct reg_property* addr) { /* On G5, we move AGP up to high bus number so we don't need * to reassign bus numbers for HT. If we ever have P2P bridges * on AGP, we'll have to move pci_assign_all_busses to the * on AGP, we'll have to move pci_assign_all_buses to the * pci_controller structure so we enable it for AGP and not for * HT childs. * We hard code the address because of the different size of Loading
arch/ppc/syslib/m82xx_pci.c +1 −1 Original line number Diff line number Diff line Loading @@ -302,7 +302,7 @@ pq2ads_setup_pci(struct pci_controller *hose) void __init pq2_find_bridges(void) { extern int pci_assign_all_busses; extern int pci_assign_all_buses; struct pci_controller * hose; int host_bridge; Loading