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Commit 393f8478 authored by Dhaval Patel's avatar Dhaval Patel
Browse files

ARM: dts: msm: add mmagic mdss axi vote for before smmu vote for msm8996 



mmagic mdss axi clock vote is required before smmu
axi clock for correct power on sequence.

Change-Id: I75bed25cac4dd922f11c41b3318ffcff9731b06e
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent a5eb2c93

arch/arm/boot/dts/qcom/msm8996-mdss.dtsi

+12 −4
Original line number Diff line number Diff line
@@ -213,8 +213,10 @@ 
			iommus = <&mdp_smmu 0>;

			gdsc-mmagic-mdss-supply = <&gdsc_mmagic_mdss>;

			clocks = <&clock_mmss clk_smmu_mdp_ahb_clk>,

				<&clock_mmss clk_mmagic_mdss_axi_clk>,

				<&clock_mmss clk_smmu_mdp_axi_clk>;

			clock-names = "mdp_ahb_clk", "mdp_axi_clk";

			clock-names = "mdp_ahb_clk", "mmagic_mdss_axi_clk",

				"mdp_axi_clk";

		};



		smmu_rot_unsec: qcom,smmu_rot_unsec_cb {
@@ -222,8 +224,10 @@ 
			iommus = <&rot_smmu 0>;

			gdsc-mmagic-mdss-supply = <&gdsc_mmagic_mdss>;

			clocks = <&clock_mmss clk_smmu_rot_ahb_clk>,

				<&clock_mmss clk_mmagic_mdss_axi_clk>,

				<&clock_mmss clk_smmu_rot_axi_clk>;

			clock-names = "rot_ahb_clk", "rot_axi_clk";

			clock-names = "rot_ahb_clk", "mmagic_mdss_axi_clk",

				"rot_axi_clk";

		};



		smmu_mdp_sec: qcom,smmu_mdp_sec_cb {
@@ -231,8 +235,10 @@ 
			iommus = <&mdp_smmu 1>;

			gdsc-mmagic-mdss-supply = <&gdsc_mmagic_mdss>;

			clocks = <&clock_mmss clk_smmu_mdp_ahb_clk>,

				<&clock_mmss clk_mmagic_mdss_axi_clk>,

				<&clock_mmss clk_smmu_mdp_axi_clk>;

			clock-names = "mdp_ahb_clk", "mdp_axi_clk";

			clock-names = "mdp_ahb_clk", "mmagic_mdss_axi_clk",

				"mdp_axi_clk";

		};



		smmu_rot_sec: qcom,smmu_rot_sec_cb {
@@ -240,8 +246,10 @@ 
			iommus = <&rot_smmu 1>;

			gdsc-mmagic-mdss-supply = <&gdsc_mmagic_mdss>;

			clocks = <&clock_mmss clk_smmu_rot_ahb_clk>,

				<&clock_mmss clk_mmagic_mdss_axi_clk>,

				<&clock_mmss clk_smmu_rot_axi_clk>;

			clock-names = "rot_ahb_clk", "rot_axi_clk";

			clock-names = "rot_ahb_clk", "mmagic_mdss_axi_clk",

				"rot_axi_clk";

		};



		mdss_fb0: qcom,mdss_fb_primary {