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Commit 38fcf818 authored by Abhimanyu Kapur's avatar Abhimanyu Kapur Committed by Matt Wagantall
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soc: qcom: Add kryo l2 accessors driver snapshot 



This is a snapshot of kryo l2 accessors driver as of
msm-3.14 commit:

3bc54cf86bdc7affa7cd4bf7faa3c57fe8f8819d (Merge "msm:
camera: Add dummy sub module in sensor pipeline")

Signed-off-by: default avatarAbhimanyu Kapur <abhimany@codeaurora.org>
parent e700f78b

drivers/soc/qcom/Makefile

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@@ -8,3 +8,4 @@ obj-$(CONFIG_MSM_CPU_PWR_CTL) += cpu_pwr_ctl.o 
obj-$(CONFIG_ARM64) += cpu_ops.o

obj-$(CONFIG_MSM_CACHE_M4M_ERP64) += cache_m4m_erp64.o

obj-$(CONFIG_SOC_BUS)  +=      socinfo.o

obj-$(CONFIG_ARCH_MSM8996) += kryo-l2-accessors.o

drivers/soc/qcom/kryo-l2-accessors.c

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/*

 * Copyright (c) 2014, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <linux/spinlock.h>

#include <linux/module.h>

#include <linux/msm_rtb.h>

#include <asm/cputype.h>



#include <soc/qcom/kryo-l2-accessors.h>



#define	L2CPUSRSELR_EL1	S3_3_c15_c0_6

#define	L2CPUSRDR_EL1	S3_3_c15_c0_7



#define arm64_sys_reg_read(reg) ({					\

	u64 __val;							\

	asm volatile("mrs %0, " __stringify(reg) : "=r" (__val));	\

	__val;								\

})



#define arm64_sys_reg_write(reg, val) {					\

	asm volatile("msr " __stringify(reg) ", %0" : : "r" (val));	\

}



static DEFINE_RAW_SPINLOCK(l2_access_lock);



/**

 * set_l2_indirect_reg: write value to an L2 register

 * @reg: Address of L2 register.

 * @value: Value to be written to register.

 *

 * Use architecturally required barriers for ordering between system register

 * accesses, and system registers with respect to device memory

 */

void set_l2_indirect_reg(u64 reg, u64 val)

{

	unsigned long flags;

	mb();

	raw_spin_lock_irqsave(&l2_access_lock, flags);

	uncached_logk(LOGK_L2CPWRITE, (void *)reg);

	arm64_sys_reg_write(L2CPUSRSELR_EL1, reg);

	isb();

	arm64_sys_reg_write(L2CPUSRDR_EL1, val);

	isb();

	raw_spin_unlock_irqrestore(&l2_access_lock, flags);

}

EXPORT_SYMBOL(set_l2_indirect_reg);



/**

 * get_l2_indirect_reg: read an L2 register value

 * @reg: Address of L2 register.

 *

 * Use architecturally required barriers for ordering between system register

 * accesses, and system registers with respect to device memory

 */

u64 get_l2_indirect_reg(u64 reg)

{

	u64 val;

	unsigned long flags;



	raw_spin_lock_irqsave(&l2_access_lock, flags);

	uncached_logk(LOGK_L2CPREAD, (void *)reg);

	arm64_sys_reg_write(L2CPUSRSELR_EL1, reg);

	isb();

	val = arm64_sys_reg_read(L2CPUSRDR_EL1);

	raw_spin_unlock_irqrestore(&l2_access_lock, flags);



	return val;

}

EXPORT_SYMBOL(get_l2_indirect_reg);

include/soc/qcom/kryo-l2-accessors.h

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/*

 * Copyright (c) 2011-2014 The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef __ASM_ARCH_MSM_MSM_KRYO_L2_ACCESSORS_H

#define __ASM_ARCH_MSM_MSM_KRYO_L2_ACCESSORS_H



#ifdef CONFIG_ARCH_MSM8996

void set_l2_indirect_reg(u64 reg_addr, u64 val);

u64 get_l2_indirect_reg(u64 reg_addr);

#else

static inline void set_l2_indirect_reg(u32 reg_addr, u32 val) {}

static inline u32 get_l2_indirect_reg(u32 reg_addr)

{

	return 0;

}

#endif

#endif