Loading arch/arm/boot/dts/qcom/mdmcalifornium-rumi.dts +31 −0 Original line number Diff line number Diff line Loading @@ -53,3 +53,34 @@ &qnand_1 { status = "ok"; }; &usb3 { dwc3@8a00000 { maximum-speed = "high-speed"; }; }; &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x08a0cd00 0x40>; reg-names = "qusb_phy_base", "qscratch_base", "emu_phy_base"; qcom,emulation; qcom,qusb-phy-init-seq = <0x19 0x404 0x20 0x414 0x79 0x410 0x00 0x418 0x99 0x404 0x04 0x408 0xd9 0x404>; qcom,emu-dcm-reset-seq = <0x100000 0x20 0x0 0x20 0x1e0 0x20 0x5 0x14>; }; &ssphy { compatible = "usb-nop-xceiv"; }; arch/arm/boot/dts/qcom/mdmcalifornium.dtsi +104 −0 Original line number Diff line number Diff line Loading @@ -487,6 +487,110 @@ cell-index = <0>; qcom,not-wakeup; /* Needed until Full-boot-chain enabled */ }; usb3: ssusb@8a00000 { compatible = "qcom,dwc-usb3-msm"; reg = <0x08a00000 0xf8c00>; #address-cells = <1>; #size-cells = <1>; ranges; interrupt-parent = <&usb3>; interrupts = <0 1>; #interrupt-cells = <1>; interrupt-map-mask = <0x0 0xffffffff>; interrupt-map = <0x0 0 &intc 0 202 0 0x0 1 &intc 0 180 0>; interrupt-names = "hs_phy_irq", "pwr_event_irq"; USB3_GDSC-supply = <&gdsc_usb30>; vdda33-supply = <&pmdcalifornium_l10>; vdda18-supply = <&pmdcalifornium_l5>; qcom,msm-bus,name = "usb3"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <61 512 0 0>, <61 512 0 960000>; qcom,power-collapse-on-cable-disconnect; qcom,por-after-power-collapse; qcom,lpm-to-suspend-delay-ms = <2000>; clocks = <&clock_gcc clk_gcc_usb30_master_clk>, <&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>, <&clock_gcc clk_gcc_usb30_mock_utmi_clk>, <&clock_gcc clk_gcc_usb30_sleep_clk>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_cxo_dwc3_clk>; clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk", "ref_clk", "xo"; dwc3@8a00000 { compatible = "snps,dwc3"; reg = <0x08a00000 0xcd00>; interrupt-parent = <&intc>; interrupts = <0 131 0>; usb-phy = <&qusb_phy>, <&ssphy>; snps,nominal-elastic-buffer; snps,hird_thresh = <0x7>; snps,lpm-nyet-thresh = <0x8>; snps,bus-suspend-enable; snps,usb3-u1u2-disable; }; }; android_usb { compatible = "qcom,android-usb"; }; qusb_phy: qusb@79000 { compatible = "qcom,qusb2phy"; reg = <0x00079000 0x180>, <0x08af8800 0x400>; reg-names = "qusb_phy_base", "qscratch_base"; vdd-supply = <&pmdcalifornium_l4>; vdda18-supply = <&pmdcalifornium_l5>; vdda33-supply = <&pmdcalifornium_l10>; qcom,vdd-voltage-level = <0 928000 928000>; qcom,qusb-tune = <0xa06393d5>; phy_type = "utmi"; clocks = <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_gcc_qusb_ref_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, <&clock_gcc clk_gcc_qusb2a_phy_reset>; clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk", "phy_reset"; }; ssphy: ssphy@78000 { compatible = "qcom,usb-ssphy-qmp"; reg = <0x00078000 0x45c>, <0x0007e000 0x400>, <0x01947244 0x4>; reg-names = "qmp_phy_base", "qmp_ahb2phy_base", "vls_clamp_reg"; vdd-supply = <&pmdcalifornium_l4>; vdda18-supply = <&pmdcalifornium_l5>; qcom,vdd-voltage-level = <0 928000 928000>; qcom,vbus-valid-override; clocks = <&clock_gcc clk_gcc_usb3_aux_clk>, <&clock_gcc clk_gcc_usb3_pipe_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, <&clock_gcc clk_gcc_usb3_phy_reset>, <&clock_gcc clk_gcc_usb3phy_phy_reset>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_gcc_usb_ss_ref_clk>; clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk", "phy_reset", "phy_phy_reset", "ref_clk_src", "ref_clk"; }; }; &gdsc_usb30 { Loading Loading
arch/arm/boot/dts/qcom/mdmcalifornium-rumi.dts +31 −0 Original line number Diff line number Diff line Loading @@ -53,3 +53,34 @@ &qnand_1 { status = "ok"; }; &usb3 { dwc3@8a00000 { maximum-speed = "high-speed"; }; }; &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x08a0cd00 0x40>; reg-names = "qusb_phy_base", "qscratch_base", "emu_phy_base"; qcom,emulation; qcom,qusb-phy-init-seq = <0x19 0x404 0x20 0x414 0x79 0x410 0x00 0x418 0x99 0x404 0x04 0x408 0xd9 0x404>; qcom,emu-dcm-reset-seq = <0x100000 0x20 0x0 0x20 0x1e0 0x20 0x5 0x14>; }; &ssphy { compatible = "usb-nop-xceiv"; };
arch/arm/boot/dts/qcom/mdmcalifornium.dtsi +104 −0 Original line number Diff line number Diff line Loading @@ -487,6 +487,110 @@ cell-index = <0>; qcom,not-wakeup; /* Needed until Full-boot-chain enabled */ }; usb3: ssusb@8a00000 { compatible = "qcom,dwc-usb3-msm"; reg = <0x08a00000 0xf8c00>; #address-cells = <1>; #size-cells = <1>; ranges; interrupt-parent = <&usb3>; interrupts = <0 1>; #interrupt-cells = <1>; interrupt-map-mask = <0x0 0xffffffff>; interrupt-map = <0x0 0 &intc 0 202 0 0x0 1 &intc 0 180 0>; interrupt-names = "hs_phy_irq", "pwr_event_irq"; USB3_GDSC-supply = <&gdsc_usb30>; vdda33-supply = <&pmdcalifornium_l10>; vdda18-supply = <&pmdcalifornium_l5>; qcom,msm-bus,name = "usb3"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <61 512 0 0>, <61 512 0 960000>; qcom,power-collapse-on-cable-disconnect; qcom,por-after-power-collapse; qcom,lpm-to-suspend-delay-ms = <2000>; clocks = <&clock_gcc clk_gcc_usb30_master_clk>, <&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>, <&clock_gcc clk_gcc_usb30_mock_utmi_clk>, <&clock_gcc clk_gcc_usb30_sleep_clk>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_cxo_dwc3_clk>; clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk", "ref_clk", "xo"; dwc3@8a00000 { compatible = "snps,dwc3"; reg = <0x08a00000 0xcd00>; interrupt-parent = <&intc>; interrupts = <0 131 0>; usb-phy = <&qusb_phy>, <&ssphy>; snps,nominal-elastic-buffer; snps,hird_thresh = <0x7>; snps,lpm-nyet-thresh = <0x8>; snps,bus-suspend-enable; snps,usb3-u1u2-disable; }; }; android_usb { compatible = "qcom,android-usb"; }; qusb_phy: qusb@79000 { compatible = "qcom,qusb2phy"; reg = <0x00079000 0x180>, <0x08af8800 0x400>; reg-names = "qusb_phy_base", "qscratch_base"; vdd-supply = <&pmdcalifornium_l4>; vdda18-supply = <&pmdcalifornium_l5>; vdda33-supply = <&pmdcalifornium_l10>; qcom,vdd-voltage-level = <0 928000 928000>; qcom,qusb-tune = <0xa06393d5>; phy_type = "utmi"; clocks = <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_gcc_qusb_ref_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, <&clock_gcc clk_gcc_qusb2a_phy_reset>; clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk", "phy_reset"; }; ssphy: ssphy@78000 { compatible = "qcom,usb-ssphy-qmp"; reg = <0x00078000 0x45c>, <0x0007e000 0x400>, <0x01947244 0x4>; reg-names = "qmp_phy_base", "qmp_ahb2phy_base", "vls_clamp_reg"; vdd-supply = <&pmdcalifornium_l4>; vdda18-supply = <&pmdcalifornium_l5>; qcom,vdd-voltage-level = <0 928000 928000>; qcom,vbus-valid-override; clocks = <&clock_gcc clk_gcc_usb3_aux_clk>, <&clock_gcc clk_gcc_usb3_pipe_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, <&clock_gcc clk_gcc_usb3_phy_reset>, <&clock_gcc clk_gcc_usb3phy_phy_reset>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_gcc_usb_ss_ref_clk>; clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk", "phy_reset", "phy_phy_reset", "ref_clk_src", "ref_clk"; }; }; &gdsc_usb30 { Loading