Loading arch/arm/boot/dts/qcom/msm8996-mdss-pll.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,8 @@ clocks = <&clock_mmss clk_mdss_ahb_clk>; clock-names = "iface_clk"; clock-rate = <0>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; /* Memory region for passing dynamic refresh pll codes */ memory-region = <&dfps_data_mem>; Loading Loading @@ -63,6 +65,8 @@ clocks = <&clock_mmss clk_mdss_ahb_clk>; clock-names = "iface_clk"; clock-rate = <0>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; qcom,platform-supply-entries { #address-cells = <1>; Loading Loading
arch/arm/boot/dts/qcom/msm8996-mdss-pll.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,8 @@ clocks = <&clock_mmss clk_mdss_ahb_clk>; clock-names = "iface_clk"; clock-rate = <0>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; /* Memory region for passing dynamic refresh pll codes */ memory-region = <&dfps_data_mem>; Loading Loading @@ -63,6 +65,8 @@ clocks = <&clock_mmss clk_mdss_ahb_clk>; clock-names = "iface_clk"; clock-rate = <0>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; qcom,platform-supply-entries { #address-cells = <1>; Loading