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Commit 3747b36e authored by Russell King's avatar Russell King Committed by Russell King
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[ARM] proc-v6: mark page table walks outer-cacheable, shared. Enable NX. 



Mark page table walks with outer-cacheable attribute, and enable no-execute
in page tables.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 4682adcf

arch/arm/mm/proc-v6.S

+12 −4
Original line number Diff line number Diff line
@@ -21,6 +21,14 @@ 


#define D_CACHE_LINE_SIZE	32



#define TTB_C		(1 << 0)

#define TTB_S		(1 << 1)

#define TTB_IMP		(1 << 2)

#define TTB_RGN_NC	(0 << 3)

#define TTB_RGN_WBWA	(1 << 3)

#define TTB_RGN_WT	(2 << 3)

#define TTB_RGN_WB	(3 << 3)



	.macro	cpsie, flags

	.ifc \flags, f

	.long	0xf1080040
@@ -115,7 +123,7 @@ ENTRY(cpu_v6_switch_mm) 
	mov	r2, #0

	ldr	r1, [r1, #MM_CONTEXT_ID]	@ get mm->context.id

#ifdef CONFIG_SMP

	orr	r0, r0, #2			@ set shared pgtable

	orr	r0, r0, #TTB_RGN_WBWA|TTB_S	@ mark PTWs shared, outer cacheable

#endif

	mcr	p15, 0, r2, c7, c5, 6		@ flush BTAC/BTB

	mcr	p15, 0, r2, c7, c10, 4		@ drain write buffer
@@ -161,8 +169,8 @@ ENTRY(cpu_v6_set_pte) 
	tst	r1, #L_PTE_YOUNG

	biceq	r2, r2, #PTE_EXT_APX | PTE_EXT_AP_MASK



@	tst	r1, #L_PTE_EXEC

@	orreq	r2, r2, #PTE_EXT_XN

	tst	r1, #L_PTE_EXEC

	orreq	r2, r2, #PTE_EXT_XN



	tst	r1, #L_PTE_PRESENT

	moveq	r2, #0
@@ -221,7 +229,7 @@ __v6_setup: 
	mcr	p15, 0, r0, c8, c7, 0		@ invalidate I + D TLBs

	mcr	p15, 0, r0, c2, c0, 2		@ TTB control register

#ifdef CONFIG_SMP

	orr	r4, r4, #2			@ set shared pgtable

	orr	r4, r4, #TTB_RGN_WBWA|TTB_S	@ mark PTWs shared, outer cacheable

#endif

	mcr	p15, 0, r4, c2, c0, 1		@ load TTB1

#ifdef CONFIG_VFP