Loading drivers/gpu/msm/adreno_a5xx.c +1 −2 Original line number Diff line number Diff line Loading @@ -1174,8 +1174,7 @@ static const struct { unsigned int count; } a5xx_hwcg_registers[] = { { adreno_is_a540, a540_hwcg_regs, ARRAY_SIZE(a540_hwcg_regs) }, { adreno_is_a530v3, a530_hwcg_regs, ARRAY_SIZE(a530_hwcg_regs) }, { adreno_is_a530v2, a530_hwcg_regs, ARRAY_SIZE(a530_hwcg_regs) }, { adreno_is_a530, a530_hwcg_regs, ARRAY_SIZE(a530_hwcg_regs) }, { adreno_is_a510, a510_hwcg_regs, ARRAY_SIZE(a510_hwcg_regs) }, { adreno_is_a505, a50x_hwcg_regs, ARRAY_SIZE(a50x_hwcg_regs) }, { adreno_is_a506, a50x_hwcg_regs, ARRAY_SIZE(a50x_hwcg_regs) }, Loading Loading
drivers/gpu/msm/adreno_a5xx.c +1 −2 Original line number Diff line number Diff line Loading @@ -1174,8 +1174,7 @@ static const struct { unsigned int count; } a5xx_hwcg_registers[] = { { adreno_is_a540, a540_hwcg_regs, ARRAY_SIZE(a540_hwcg_regs) }, { adreno_is_a530v3, a530_hwcg_regs, ARRAY_SIZE(a530_hwcg_regs) }, { adreno_is_a530v2, a530_hwcg_regs, ARRAY_SIZE(a530_hwcg_regs) }, { adreno_is_a530, a530_hwcg_regs, ARRAY_SIZE(a530_hwcg_regs) }, { adreno_is_a510, a510_hwcg_regs, ARRAY_SIZE(a510_hwcg_regs) }, { adreno_is_a505, a50x_hwcg_regs, ARRAY_SIZE(a50x_hwcg_regs) }, { adreno_is_a506, a50x_hwcg_regs, ARRAY_SIZE(a50x_hwcg_regs) }, Loading