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Commit 36d2e814 authored by Weijun Yang's avatar Weijun Yang Committed by Sasha Levin
Browse files

mmc: core: enable CMD19 tuning for DDR50 mode



[ Upstream commit 4324f6de6d2eb9b232410eb0d67bfafdde8ba711 ]

As SD Specifications Part1 Physical Layer Specification Version
3.01 says, CMD19 tuning is available for unlocked cards in transfer
state of 1.8V signaling mode. The small difference between v3.00
and 3.01 spec means that CMD19 tuning is also available for DDR50
mode.

Signed-off-by: default avatarWeijun Yang <york.yang@csr.com>
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarSasha Levin <sasha.levin@oracle.com>
parent ac26a195
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+18 −2
Original line number Diff line number Diff line
@@ -662,8 +662,24 @@ static int mmc_sd_init_uhs_card(struct mmc_card *card)
	 */
	if (!mmc_host_is_spi(card->host) &&
		(card->sd_bus_speed == UHS_SDR50_BUS_SPEED ||
	     card->sd_bus_speed == UHS_SDR104_BUS_SPEED))
		 card->sd_bus_speed == UHS_DDR50_BUS_SPEED ||
		 card->sd_bus_speed == UHS_SDR104_BUS_SPEED)) {
		err = mmc_execute_tuning(card);

		/*
		 * As SD Specifications Part1 Physical Layer Specification
		 * Version 3.01 says, CMD19 tuning is available for unlocked
		 * cards in transfer state of 1.8V signaling mode. The small
		 * difference between v3.00 and 3.01 spec means that CMD19
		 * tuning is also available for DDR50 mode.
		 */
		if (err && card->sd_bus_speed == UHS_DDR50_BUS_SPEED) {
			pr_warn("%s: ddr50 tuning failed\n",
				mmc_hostname(card->host));
			err = 0;
		}
	}

out:
	kfree(status);