Merge branches 'depends/rmk/io', 'depends/rmk/l2x0' and 'depends/rmk/gpio' into highbank/soc

* ARM L2 Cache Controller

ARM cores often have a separate level 2 cache controller. There are various

implementations of the L2 cache controller with compatible programming models.

The ARM L2 cache representation in the device tree should be done as follows:

Required properties:

- compatible : should be one of:

	"arm,pl310-cache"

	"arm,l220-cache"

	"arm,l210-cache"

- cache-unified : Specifies the cache is a unified cache.

- cache-level : Should be set to 2 for a level 2 cache.

- reg : Physical base address and size of cache controller's memory mapped

  registers.

Optional properties:

- arm,data-latency : Cycles of latency for Data RAM accesses. Specifies 3 cells of

  read, write and setup latencies. Minimum valid values are 1. Controllers

  without setup latency control should use a value of 0.

- arm,tag-latency : Cycles of latency for Tag RAM accesses. Specifies 3 cells of

  read, write and setup latencies. Controllers without setup latency control

  should use 0. Controllers without separate read and write Tag RAM latency

  values should only use the first cell.

- arm,dirty-latency : Cycles of latency for Dirty RAMs. This is a single cell.

- arm,filter-ranges : <start length> Starting address and length of window to

  filter. Addresses in the filter window are directed to the M1 port. Other

  addresses will go to the M0 port.

- interrupts : 1 combined interrupt.

Example:

L2: cache-controller {

        compatible = "arm,pl310-cache";

        reg = <0xfff12000 0x1000>;

        arm,data-latency = <1 1 1>;

        arm,tag-latency = <2 2 2>;

        arm,filter-latency = <0x80000000 0x8000000>;

        cache-unified;

        cache-level = <2>;

	interrupts = <45>;

};

	select CLKDEV_LOOKUP

	select HAVE_MACH_CLKDEV

	select GENERIC_GPIO

	select ARCH_REQUIRE_GPIOLIB

	help

	  Support for ST-Ericsson U300 series mobile platforms.

 */

#include <linux/device.h>

#include <linux/gpio.h>

#include <linux/string.h>

#include <linux/slab.h>

#include <linux/platform_device.h>

#include <linux/io.h>

#include <asm/gpio.h>

#include <asm/hardware/scoop.h>

/* PCMCIA to Scoop linkage

	/* Private internal data */

	const char		*card_desc;	/* Card description		*/

	CONST unsigned int	podaddr;	/* Base Linux address for card	*/

	CONST loader_t		loader;		/* loader program */

	u64			dma_mask;

};

/* not all ARM platforms necessarily support this API ... */

#include <mach/gpio.h>

#ifndef __ARM_GPIOLIB_COMPLEX

/* Note: this may rely upon the value of ARCH_NR_GPIOS set in mach/gpio.h */

#include <asm-generic/gpio.h>

/* The trivial gpiolib dispatchers */

#define gpio_get_value  __gpio_get_value

#define gpio_set_value  __gpio_set_value

#define gpio_cansleep   __gpio_cansleep

#endif

/*

 * Provide a default gpio_to_irq() which should satisfy every case.

 * However, some platforms want to do this differently, so allow them

 * to override it.

 */

#ifndef gpio_to_irq

#define gpio_to_irq	__gpio_to_irq

#endif

#endif /* _ARCH_ARM_GPIO_H */