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Commit 35edc2a5 authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
Browse files

perf, arch: Rework perf_event_index() 



Put the logic to compute the event index into a per pmu method. This
is required because the x86 rules are weird and wonderful and don't
match the capabilities of the current scheme.

AFAIK only powerpc actually has a usable userspace read of the PMCs
but I'm not at all sure anybody actually used that.

ARM is restored to the default since it currently does not support
userspace access at all. And all software events are provided with a
method that reports their index as 0 (disabled).

Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Michael Cree <mcree@orcon.net.nz>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Eric B Munson <emunson@mgebm.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: David S. Miller <davem@davemloft.net>
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Arun Sharma <asharma@fb.com>
Link: http://lkml.kernel.org/n/tip-dfydxodki16lylkt3gl2j7cw@git.kernel.org


Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 9a0f05cb

arch/arm/include/asm/perf_event.h

+0 −4
Original line number Diff line number Diff line
@@ -12,10 +12,6 @@ 
#ifndef __ARM_PERF_EVENT_H__

#define __ARM_PERF_EVENT_H__



/* ARM performance counters start from 1 (in the cp15 accesses) so use the

 * same indexes here for consistency. */

#define PERF_EVENT_INDEX_OFFSET 1



/* ARM perf PMU IDs for use by internal perf clients. */

enum arm_perf_pmu_ids {

	ARM_PERF_PMU_ID_XSCALE1	= 0,

arch/frv/include/asm/perf_event.h

+0 −2
Original line number Diff line number Diff line
@@ -12,6 +12,4 @@ 
#ifndef _ASM_PERF_EVENT_H

#define _ASM_PERF_EVENT_H



#define PERF_EVENT_INDEX_OFFSET	0



#endif /* _ASM_PERF_EVENT_H */

arch/hexagon/include/asm/perf_event.h

+0 −2
Original line number Diff line number Diff line
@@ -19,6 +19,4 @@ 
#ifndef _ASM_PERF_EVENT_H

#define _ASM_PERF_EVENT_H



#define PERF_EVENT_INDEX_OFFSET	0



#endif /* _ASM_PERF_EVENT_H */

arch/powerpc/include/asm/perf_event_server.h

+0 −2
Original line number Diff line number Diff line
@@ -61,8 +61,6 @@ struct pt_regs; 
extern unsigned long perf_misc_flags(struct pt_regs *regs);

extern unsigned long perf_instruction_pointer(struct pt_regs *regs);



#define PERF_EVENT_INDEX_OFFSET	1



/*

 * Only override the default definitions in include/linux/perf_event.h

 * if we have hardware PMU support.

arch/powerpc/kernel/perf_event.c

+6 −0
Original line number Diff line number Diff line
@@ -1187,6 +1187,11 @@ static int power_pmu_event_init(struct perf_event *event) 
	return err;

}



static int power_pmu_event_idx(struct perf_event *event)

{

	return event->hw.idx;

}



struct pmu power_pmu = {

	.pmu_enable	= power_pmu_enable,

	.pmu_disable	= power_pmu_disable,
@@ -1199,6 +1204,7 @@ struct pmu power_pmu = { 
	.start_txn	= power_pmu_start_txn,

	.cancel_txn	= power_pmu_cancel_txn,

	.commit_txn	= power_pmu_commit_txn,

	.event_idx	= power_pmu_event_idx,

};



/*