Merge "Revert "ARM: dts: msm: Add memory latency devices for msmtitanium""

			<  7104 /*  931.2 MHz */ >;     /* TURBO */

	};

	memlat_cpu0: qcom,memlat-cpu0 {

		compatible = "qcom,devbw";

		governor = "cpufreq";

		qcom,src-dst-ports = <1 512>;

		qcom,active-only;

		qcom,bw-tbl =

			<   769 /*  100.8 MHz */ >,

			<  1611 /*  211.2 MHz */ >,     /*Low SVS*/

			<  2124 /*  278.4 MHz */ >,

			<  2929 /*  384   MHz */ >,

			<  3221 /*  422.4 MHz */ >,	/* SVS */

			<  4248 /*  556.8 MHz */ >,

			<  5126 /*  672   MHz */ >,

			<  5859 /*  768   MHz */ >,     /* SVS+  */

			<  6152 /*  806.4 MHz */ >,

			<  6445 /*  844.8 MHz */ >,     /* NOM   */

			<  7104 /*  931.2 MHz */ >;     /* TURBO */

	};

	memlat_cpu4: qcom,memlat-cpu4 {

		compatible = "qcom,devbw";

		governor = "cpufreq";

		qcom,src-dst-ports = <1 512>;

		qcom,active-only;

		qcom,bw-tbl =

			<   769 /*  100.8 MHz */ >,

			<  1611 /*  211.2 MHz */ >,     /*Low SVS*/

			<  2124 /*  278.4 MHz */ >,

			<  2929 /*  384   MHz */ >,

			<  3221 /*  422.4 MHz */ >,	/* SVS */

			<  4248 /*  556.8 MHz */ >,

			<  5126 /*  672   MHz */ >,

			<  5859 /*  768   MHz */ >,     /* SVS+  */

			<  6152 /*  806.4 MHz */ >,

			<  6445 /*  844.8 MHz */ >,     /* NOM   */

			<  7104 /*  931.2 MHz */ >;     /* TURBO */

	};

	qcom,arm-memlat-mon-0 {

		compatible = "qcom,arm-memlat-mon";

		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

		qcom,target-dev = <&memlat_cpu0>;

	};

	qcom,arm-memlat-mon-4 {

		compatible = "qcom,arm-memlat-mon";

		qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;

		qcom,target-dev = <&memlat_cpu4>;

	};

	qcom,cpu-bwmon {

		compatible = "qcom,bimc-bwmon2";

		reg = <0x408000 0x300>, <0x401000 0x200>;