Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3581ced3 authored by Borislav Petkov's avatar Borislav Petkov Committed by Dave Jones
Browse files

[CPUFREQ] powernow-k8: Limit Pstate transition latency check



The Pstate transition latency check was added for broken F10h BIOSen
which wrongly contain a value of 0 for transition and bus master
latency. Fam11h and later, however, (will) have similar transition
latency so extend that behavior for them too.

Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
Signed-off-by: default avatarDave Jones <davej@redhat.com>
parent 179ee434
Loading
Loading
Loading
Loading
+5 −6
Original line number Diff line number Diff line
@@ -1023,13 +1023,12 @@ static int get_transition_latency(struct powernow_k8_data *data)
	}
	if (max_latency == 0) {
		/*
		 * Fam 11h always returns 0 as transition latency.
		 * This is intended and means "very fast". While cpufreq core
		 * and governors currently can handle that gracefully, better
		 * set it to 1 to avoid problems in the future.
		 * For all others it's a BIOS bug.
		 * Fam 11h and later may return 0 as transition latency. This
		 * is intended and means "very fast". While cpufreq core and
		 * governors currently can handle that gracefully, better set it
		 * to 1 to avoid problems in the future.
		 */
		if (boot_cpu_data.x86 != 0x11)
		if (boot_cpu_data.x86 < 0x11)
			printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
				"latency\n");
		max_latency = 1;