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Commit 35702389 authored Jan 14, 2016 by Rupesh Tatiya

ARM: dts: msm: Configure PMIC GPIO6 for mdm9607 for CDP and MTP



32kHz sleep clock of QCA6174/QCA9377 is connected to PMIC GPIO6.
If it is not properly configured, we end up seeing high current.

Change-Id: Icf93bd703bafcb51c881d3e2d2d492998f94d911
Signed-off-by: Rupesh Tatiya <rtatiya@codeaurora.org>

parent d171201f

arch/arm/boot/dts/qcom/mdm9607-cdp.dtsi

+12 −0

Original line number	Diff line number	Diff line
		@@ -90,6 +90,18 @@
		qcom,master-en = <1>; /* Enable GPIO */
		status = "okay";
		};

		/* ROME 32k Sleep Clock */
		gpio@c500 {
		qcom,mode = <1>; /* Digital output */
		qcom,output-type = <0>; /* CMOS logic */
		qcom,invert = <0>; /* no inversion */
		qcom,vin-sel = <2>; /* VIN 2 */
		qcom,src-sel = <2>; /* Function 2 */
		qcom,out-strength = <2>; /* Medium */
		qcom,master-en = <1>; /* Enable GPIO */
		status = "ok";
		};
		};

		&pm8019_gpios {

arch/arm/boot/dts/qcom/mdm9607-mtp.dtsi

+12 −0

Original line number	Diff line number	Diff line
		@@ -88,6 +88,18 @@
		qcom,master-en = <1>; /* Enable GPIO */
		status = "okay";
		};

		/* ROME 32k Sleep Clock */
		gpio@c500 {
		qcom,mode = <1>; /* Digital output */
		qcom,output-type = <0>; /* CMOS logic */
		qcom,invert = <0>; /* no inversion */
		qcom,vin-sel = <2>; /* VIN 2 */
		qcom,src-sel = <2>; /* Function 2 */
		qcom,out-strength = <2>; /* Medium */
		qcom,master-en = <1>; /* Enable GPIO */
		status = "ok";
		};
		};

		&sdhc_1 {