Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 32e3cd6e authored by Daniel Vetter's avatar Daniel Vetter
Browse files

agp/intel-gtt: move gart base addres setup 



We need this thing much earlier, and it doesn't make sense
in the hw enabling function intel_enable_gtt - this does not
change over a suspend/resume cycle ...

Reviewed-by: default avatarJani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 14be93dd

drivers/char/agp/intel-gtt.c

+10 −10
Original line number Original line Diff line number Diff line
@@ -648,6 +648,7 @@ static void intel_gtt_cleanup(void) 




static int intel_gtt_init(void)

static int intel_gtt_init(void)

{

{

	u32 gma_addr;

	u32 gtt_map_size;

	u32 gtt_map_size;

	int ret;

	int ret;
@@ -694,6 +695,15 @@ static int intel_gtt_init(void) 
		return ret;

		return ret;

	}

	}





	if (INTEL_GTT_GEN <= 2)

		pci_read_config_dword(intel_private.pcidev, I810_GMADDR,

				      &gma_addr);

	else

		pci_read_config_dword(intel_private.pcidev, I915_GMADDR,

				      &gma_addr);



	intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);



	return 0;

	return 0;

}

}
@@ -769,18 +779,8 @@ static void i830_write_entry(dma_addr_t addr, unsigned int entry, 




static bool intel_enable_gtt(void)

static bool intel_enable_gtt(void)

{

{

	u32 gma_addr;

	u8 __iomem *reg;

	u8 __iomem *reg;





	if (INTEL_GTT_GEN <= 2)

		pci_read_config_dword(intel_private.pcidev, I810_GMADDR,

				      &gma_addr);

	else

		pci_read_config_dword(intel_private.pcidev, I915_GMADDR,

				      &gma_addr);



	intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);



	if (INTEL_GTT_GEN >= 6)

	if (INTEL_GTT_GEN >= 6)

	    return true;

	    return true;