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Commit 32c7dbfd authored by Alexander Graf's avatar Alexander Graf
Browse files

KVM: PPC: Book3S: PR: Fix hsrr code 



When jumping back into the kernel to code that knows that it would be
using HSRR registers instead of SRR registers, we need to make sure we
pass it all information on where to jump to in HSRR registers.

Unfortunately, we used r10 to store the information to distinguish between
the HSRR and SRR case. That register got clobbered in between though,
rendering the later comparison invalid.

Instead, let's use cr1 to store this information. That way we don't
need yet another register and everyone's happy.

This fixes PR KVM on POWER7 bare metal for me.

Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 56e13dba

arch/powerpc/kvm/book3s_segment.S

+3 −4
Original line number Diff line number Diff line
@@ -197,8 +197,8 @@ kvmppc_interrupt: 
	/* Save guest PC and MSR */

#ifdef CONFIG_PPC64

BEGIN_FTR_SECTION

	mr	r10, r12

	andi.	r0, r12, 0x2

	cmpwi	cr1, r0, 0

	beq	1f

	mfspr	r3,SPRN_HSRR0

	mfspr	r4,SPRN_HSRR1
@@ -345,8 +345,7 @@ no_dcbz32_off: 


#ifdef CONFIG_PPC64

BEGIN_FTR_SECTION

	andi.	r0,r10,0x2

	beq	1f

	beq	cr1, 1f

	mtspr	SPRN_HSRR1, r6

	mtspr	SPRN_HSRR0, r8

END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)