Commit 31ce1550 authored Mar 21, 2016 by Deepak Katragadda

clk: msm: clock-gcc-cobalt: Add cxo as bimc_clk parent



XO shutdown should not happen when there's still a sleep
vote on DDR. Making CXO as bimc_clk parent takes care of
this.

CRs-Fixed: 992753
Change-Id: I49ac2aefb645a4463cb1873072cd3a1f9a136dad
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>

parent 17d7bd58

drivers/clk/msm/clock-gcc-cobalt.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -2695,6 +2695,7 @@ static int msm_gcc_cobalt_probe(struct platform_device *pdev)
		return PTR_ERR(vdd_dig.regulator[0]);
		}

		bimc_clk.c.parent = &cxo_clk_src.c;
		ret = of_msm_clock_register(pdev->dev.of_node, msm_clocks_rpm_cobalt,
		ARRAY_SIZE(msm_clocks_rpm_cobalt));
		if (ret)