Loading arch/arm/configs/msmcortex-perf_defconfig +3 −1 Original line number Diff line number Diff line Loading @@ -285,7 +285,9 @@ CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_CNSS_CRYPTO=y CONFIG_ATH_CARDS=y CONFIG_CLD_LL_CORE=y CONFIG_CNSS=y CONFIG_CNSS_SDIO=y CONFIG_CLD_HL_SDIO_CORE=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=m CONFIG_INPUT_KEYRESET=y Loading arch/arm/configs/msmcortex_defconfig +3 −1 Original line number Diff line number Diff line Loading @@ -227,7 +227,6 @@ CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_HIDP=y CONFIG_MSM_BT_POWER=y CONFIG_CFG80211=y CONFIG_NL80211_TESTMODE=y CONFIG_CFG80211_INTERNAL_REGDB=y CONFIG_RFKILL=y CONFIG_NFC_NQ=y Loading Loading @@ -287,6 +286,9 @@ CONFIG_WCNSS_CORE_PRONTO=y CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_CNSS_CRYPTO=y CONFIG_CNSS=y CONFIG_CNSS_SDIO=y CONFIG_CLD_HL_SDIO_CORE=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=m CONFIG_KEYBOARD_GPIO=y Loading Loading
arch/arm/configs/msmcortex-perf_defconfig +3 −1 Original line number Diff line number Diff line Loading @@ -285,7 +285,9 @@ CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_CNSS_CRYPTO=y CONFIG_ATH_CARDS=y CONFIG_CLD_LL_CORE=y CONFIG_CNSS=y CONFIG_CNSS_SDIO=y CONFIG_CLD_HL_SDIO_CORE=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=m CONFIG_INPUT_KEYRESET=y Loading
arch/arm/configs/msmcortex_defconfig +3 −1 Original line number Diff line number Diff line Loading @@ -227,7 +227,6 @@ CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_HIDP=y CONFIG_MSM_BT_POWER=y CONFIG_CFG80211=y CONFIG_NL80211_TESTMODE=y CONFIG_CFG80211_INTERNAL_REGDB=y CONFIG_RFKILL=y CONFIG_NFC_NQ=y Loading Loading @@ -287,6 +286,9 @@ CONFIG_WCNSS_CORE_PRONTO=y CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y CONFIG_WCNSS_MEM_PRE_ALLOC=y CONFIG_CNSS_CRYPTO=y CONFIG_CNSS=y CONFIG_CNSS_SDIO=y CONFIG_CLD_HL_SDIO_CORE=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=m CONFIG_KEYBOARD_GPIO=y Loading