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Commit 3103039c authored by Andi Kleen's avatar Andi Kleen Committed by Greg Kroah-Hartman
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[PATCH] PCI: handle bogus MCFG entries 



Handle more bogus MCFG entries

Some Asus P4 boards seem to have broken MCFG tables with
only a single entry for busses 0-0.  Special case these
and assume they mean all busses can be accessed.

Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 877be3f0

arch/i386/pci/mmconfig.c

+13 −2
Original line number Diff line number Diff line
@@ -36,8 +36,7 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) 
	while (1) {

		++cfg_num;

		if (cfg_num >= pci_mmcfg_config_num) {

			/* Not found - fallback to type 1 */

			return 0;

			break;

		}

		cfg = &pci_mmcfg_config[cfg_num];

		if (cfg->pci_segment_group_number != seg)
@@ -46,6 +45,18 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) 
		    (cfg->end_bus_number >= bus))

			return cfg->base_address;

	}



	/* Handle more broken MCFG tables on Asus etc.

	   They only contain a single entry for bus 0-0. Assume

 	   this applies to all busses. */

	cfg = &pci_mmcfg_config[0];

	if (pci_mmcfg_config_num == 1 &&

		cfg->pci_segment_group_number == 0 &&

		(cfg->start_bus_number | cfg->end_bus_number) == 0)

		return cfg->base_address;



	/* Fall back to type 0 */

	return 0;

}



static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)

arch/x86_64/pci/mmconfig.c

+14 −5
Original line number Diff line number Diff line
@@ -29,11 +29,8 @@ static char __iomem *get_virt(unsigned int seg, unsigned bus) 


	while (1) {

		++cfg_num;

		if (cfg_num >= pci_mmcfg_config_num) {

			/* Not found - fall back to type 1. This happens

			   e.g. on the internal devices of a K8 northbridge. */

			return NULL;

		}

		if (cfg_num >= pci_mmcfg_config_num)

			break;

		cfg = pci_mmcfg_virt[cfg_num].cfg;

		if (cfg->pci_segment_group_number != seg)

			continue;
@@ -41,6 +38,18 @@ static char __iomem *get_virt(unsigned int seg, unsigned bus) 
		    (cfg->end_bus_number >= bus))

			return pci_mmcfg_virt[cfg_num].virt;

	}



	/* Handle more broken MCFG tables on Asus etc.

	   They only contain a single entry for bus 0-0. Assume

 	   this applies to all busses. */

	cfg = &pci_mmcfg_config[0];

	if (pci_mmcfg_config_num == 1 &&

		cfg->pci_segment_group_number == 0 &&

		(cfg->start_bus_number | cfg->end_bus_number) == 0)

		return cfg->base_address;



	/* Fall back to type 0 */

	return 0;

}



static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)