usb: phy: qmp: Update PHY sequence for QMP PHY Rev1



It is suggested to use reset value of QSERDES_COM_IE_TRIM
and QSERDES_COM_IP_TRIM registers with QMP PHY Rev1 for
better RX jitter tolerance.

CRs-Fixed: 1060227
Change-Id: I16884f3aeec32c04ffa2b5e6c12dae1e95369c9e
Signed-off-by: Mayank Rana <mrana@codeaurora.org>

parent 03ffbf10

drivers/usb/phy/phy-msm-ssusb-qmp.c

+0 −2

Original line number	Diff line number	Diff line
		@@ -173,8 +173,6 @@ static const struct qmp_reg_val qmp_settings_rev1[] = {
		{0x38, 0x12}, /* QSERDES_COM_PLL_IP_SETP */
		{0x3C, 0x0F}, /* QSERDES_COM_PLL_CP_SETP */
		{0x24, 0x01}, /* QSERDES_COM_PLL_IP_SETI */
		{0x0C, 0x0F}, /* QSERDES_COM_IE_TRIM */
		{0x10, 0x0F}, /* QSERDES_COM_IP_TRIM */
		{0x14, 0x46}, /* QSERDES_COM_PLL_CNTRL */

		/* CDR Settings */