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Commit 2ff0c0df authored by Kirill A. Shutemov's avatar Kirill A. Shutemov Committed by Sami Tolvanen
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BACKPORT: arm64: expose number of page table levels on Kconfig level 



We would want to use number of page table level to define mm_struct.
Let's expose it as CONFIG_PGTABLE_LEVELS.

ARM64_PGTABLE_LEVELS is renamed to PGTABLE_LEVELS and defined before
sourcing init/Kconfig: arch/Kconfig will define default value and it's
sourced from init/Kconfig.

Signed-off-by: default avatarKirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Tested-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>

Bug: 31432001
Change-Id: I902d56585a4138eeb79ae379201a84f8aed9e73c
(cherry picked from commit 9f25e6ad58e1fb3b4d441e4c55635c4598a6fa94)
Signed-off-by: default avatarSami Tolvanen <samitolvanen@google.com>
parent aabf2539

arch/arm64/Kconfig

+7 −7
Original line number Diff line number Diff line
@@ -171,6 +171,13 @@ config KERNEL_MODE_NEON 
config FIX_EARLYCON_MEM

	def_bool y



config PGTABLE_LEVELS

	int

	default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42

	default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48

	default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39

	default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48



source "init/Kconfig"



source "kernel/Kconfig.freezer"
@@ -407,13 +414,6 @@ config ARM64_VA_BITS 
	default 42 if ARM64_VA_BITS_42

	default 48 if ARM64_VA_BITS_48



config ARM64_PGTABLE_LEVELS

	int

	default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42

	default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48

	default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39

	default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48



config CPU_BIG_ENDIAN

       bool "Build big-endian kernel"

       help

arch/arm64/include/asm/kvm_mmu.h

+2 −2
Original line number Diff line number Diff line
@@ -139,12 +139,12 @@ static inline void kvm_set_s2pmd_writable(pmd_t *pmd) 
/*

 * If we are concatenating first level stage-2 page tables, we would have less

 * than or equal to 16 pointers in the fake PGD, because that's what the

 * architecture allows.  In this case, (4 - CONFIG_ARM64_PGTABLE_LEVELS)

 * architecture allows.  In this case, (4 - CONFIG_PGTABLE_LEVELS)

 * represents the first level for the host, and we add 1 to go to the next

 * level (which uses contatenation) for the stage-2 tables.

 */

#if PTRS_PER_S2_PGD <= 16

#define KVM_PREALLOC_LEVEL	(4 - CONFIG_ARM64_PGTABLE_LEVELS + 1)

#define KVM_PREALLOC_LEVEL	(4 - CONFIG_PGTABLE_LEVELS + 1)

#else

#define KVM_PREALLOC_LEVEL	(0)

#endif

arch/arm64/include/asm/page.h

+2 −2
Original line number Diff line number Diff line
@@ -36,9 +36,9 @@ 
 * for more information).

 */

#ifdef CONFIG_ARM64_64K_PAGES

#define SWAPPER_PGTABLE_LEVELS	(CONFIG_ARM64_PGTABLE_LEVELS)

#define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS)

#else

#define SWAPPER_PGTABLE_LEVELS	(CONFIG_ARM64_PGTABLE_LEVELS - 1)

#define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS - 1)

#endif



#define SWAPPER_DIR_SIZE	(SWAPPER_PGTABLE_LEVELS * PAGE_SIZE)

arch/arm64/include/asm/pgalloc.h

+4 −4
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 


#define check_pgt_cache()		do { } while (0)



#if CONFIG_ARM64_PGTABLE_LEVELS > 2

#if CONFIG_PGTABLE_LEVELS > 2



static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)

{
@@ -44,9 +44,9 @@ static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) 
	set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));

}



#endif	/* CONFIG_ARM64_PGTABLE_LEVELS > 2 */

#endif	/* CONFIG_PGTABLE_LEVELS > 2 */



#if CONFIG_ARM64_PGTABLE_LEVELS > 3

#if CONFIG_PGTABLE_LEVELS > 3



static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)

{
@@ -64,7 +64,7 @@ static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud) 
	set_pgd(pgd, __pgd(__pa(pud) | PUD_TYPE_TABLE));

}



#endif	/* CONFIG_ARM64_PGTABLE_LEVELS > 3 */

#endif	/* CONFIG_PGTABLE_LEVELS > 3 */



extern pgd_t *pgd_alloc(struct mm_struct *mm);

extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);

arch/arm64/include/asm/pgtable-hwdef.h

+3 −3
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ 
/*

 * PMD_SHIFT determines the size a level 2 page table entry can map.

 */

#if CONFIG_ARM64_PGTABLE_LEVELS > 2

#if CONFIG_PGTABLE_LEVELS > 2

#define PMD_SHIFT		((PAGE_SHIFT - 3) * 2 + 3)

#define PMD_SIZE		(_AC(1, UL) << PMD_SHIFT)

#define PMD_MASK		(~(PMD_SIZE-1))
@@ -31,7 +31,7 @@ 
/*

 * PUD_SHIFT determines the size a level 1 page table entry can map.

 */

#if CONFIG_ARM64_PGTABLE_LEVELS > 3

#if CONFIG_PGTABLE_LEVELS > 3

#define PUD_SHIFT		((PAGE_SHIFT - 3) * 3 + 3)

#define PUD_SIZE		(_AC(1, UL) << PUD_SHIFT)

#define PUD_MASK		(~(PUD_SIZE-1))
@@ -42,7 +42,7 @@ 
 * PGDIR_SHIFT determines the size a top-level page table entry can map

 * (depending on the configuration, this level can be 0, 1 or 2).

 */

#define PGDIR_SHIFT		((PAGE_SHIFT - 3) * CONFIG_ARM64_PGTABLE_LEVELS + 3)

#define PGDIR_SHIFT		((PAGE_SHIFT - 3) * CONFIG_PGTABLE_LEVELS + 3)

#define PGDIR_SIZE		(_AC(1, UL) << PGDIR_SHIFT)

#define PGDIR_MASK		(~(PGDIR_SIZE-1))

#define PTRS_PER_PGD		(1 << (VA_BITS - PGDIR_SHIFT))