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Commit 2f7dc602 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

arm64: Fix memory shareability attribute for ioremap_wc/cache 



Write-combine and cacheable mappings use Normal memory on arm64. On SMP
systems, the pte needs the shareability bit which is set in
pgprot_default. Use this for defining PROT_DEFAULT used by ioremap_wc
and ioremap_cache (Device memory is shareable by default, does not need
additional attributes).

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 85cc00ea

arch/arm64/include/asm/io.h

+1 −1
Original line number Diff line number Diff line
@@ -229,7 +229,7 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot 
extern void __iounmap(volatile void __iomem *addr);

extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size);



#define PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)

#define PROT_DEFAULT		(pgprot_default | PTE_DIRTY)

#define PROT_DEVICE_nGnRE	(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))

#define PROT_NORMAL_NC		(PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))

#define PROT_NORMAL		(PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))