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Commit 2f7053e0 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-soc2-for-v3.10' of... 

Merge tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

Second round of Renesas ARM SoC updates for v3.10

Some Highlights:

* Add r8a7790 SoC
* Add r8a73a4 SoC
* Migrate r8a7740 SoC from INTC to GIC
* Add thermal driver support to r8a73a4 SoC
* Add irqpin DT nodes to sh73a0 SoC
* Add SCIF support to r8a7778 SoC

This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-intc-external-irq2-for-v3.10

* tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (88 commits)
  ARM: shmobile: r8a7790 SoC 64-bit DT support
  ARM: shmobile: r8a73a4 SoC 64-bit DT support
  ARM: shmobile: r8a7790 PFC support
  ARM: shmobile: r8a7790 IRQC support
  ARM: shmobile: r8a7790 SCIF support
  ARM: shmobile: Initial r8a7790 SoC support
  ARM: shmobile: r8a7779: move global functions to r8a7779.h
  ARM: shmobile: r8a7740: move global functions to r8a7740.h
  ARM: shmobile: sh73a0: move global functions to sh73a0.h
  ARM: shmobile: sh7372: move global functions to sh7372.h
  ARM: shmobile: r8a7779: remove DIV4 clocks and use fixed ratio clock
  ARM: shmobile: r8a7740: use fixed ratio clock
  ARM: shmobile: r8a7740: tidyup comment/implementation mismatch
  ARM: shmobile: sh73a0: use fixed ratio clock
  ARM: shmobile: sh7372: use fixed ratio clock
  ARM: shmobile: add struct clk_ratio and fixed ratio clock macro
  ARM: shmobile: sh7372: remove DIV4_ZT* clocks
  ARM: shmobile: sh73a0: remove DIV4_ZT* clocks
  ARM: shmobile: sh73a0: add a TWD clock
  ARM: shmobile: r8a7740: Migrate from INTC to GIC
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 07961ac7 8585deb1

arch/arm/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -723,7 +723,7 @@ config ARCH_SHMOBILE 
	select MULTI_IRQ_HANDLER

	select NEED_MACH_MEMORY_H

	select NO_IOPORT

	select PINCTRL

	select PINCTRL if ARCH_WANT_OPTIONAL_GPIOLIB

	select PM_GENERIC_DOMAINS if PM

	select SPARSE_IRQ

	help

arch/arm/boot/dts/r8a73a4.dtsi

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+94 −0
Original line number Diff line number Diff line 
/*

 * Device Tree Source for the r8a73a4 SoC

 *

 * Copyright (C) 2013 Renesas Solutions Corp.

 * Copyright (C) 2013 Magnus Damm

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



/ {

	compatible = "renesas,r8a73a4";

	interrupt-parent = <&gic>;

	#address-cells = <2>;

	#size-cells = <2>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a15";

			reg = <0>;

			clock-frequency = <1500000000>;

		};

	};



	gic: interrupt-controller@f1001000 {

		compatible = "arm,cortex-a15-gic";

		#interrupt-cells = <3>;

		#address-cells = <0>;

		interrupt-controller;

		reg = <0 0xf1001000 0 0x1000>,

			<0 0xf1002000 0 0x1000>,

			<0 0xf1004000 0 0x2000>,

			<0 0xf1006000 0 0x2000>;

		interrupts = <1 9 0xf04>;



		gic-cpuif@4 {

			compatible = "arm,gic-cpuif";

			cpuif-id = <4>;

			cpu = <&cpu0>;

		};

	};



	timer {

		compatible = "arm,armv7-timer";

		interrupts = <1 13 0xf08>,

				<1 14 0xf08>,

				<1 11 0xf08>,

				<1 10 0xf08>;

	};



	irqc0: interrupt-controller@e61c0000 {

		compatible = "renesas,irqc";

		#interrupt-cells = <2>;

		interrupt-controller;

		reg = <0 0xe61c0000 0 0x200>;

		interrupt-parent = <&gic>;

		interrupts = <0 0 4>, <0 1 4>, <0 2 4>,	<0 3 4>,

				<0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,

				<0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,

				<0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,

				<0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,

				<0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,

				<0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,

				<0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;

	};



	irqc1: interrupt-controller@e61c0200 {

		compatible = "renesas,irqc";

		#interrupt-cells = <2>;

		interrupt-controller;

		reg = <0 0xe61c0200 0 0x200>;

		interrupt-parent = <&gic>;

		interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,

				<0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,

				<0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,

				<0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,

				<0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,

				<0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,

				<0 56 4>, <0 57 4>;

	};



	thermal@e61f0000 {

		compatible = "renesas,rcar-thermal";

		reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,

			 <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;

		interrupt-parent = <&gic>;

		interrupts = <0 69 4>;

	};

};

arch/arm/boot/dts/r8a7778.dtsi

0 → 100644
+35 −0
Original line number Diff line number Diff line 
/*

 * Device Tree Source for Renesas r8a7778

 *

 * Copyright (C) 2013  Renesas Solutions Corp.

 * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

 *

 * based on r8a7779

 *

 * Copyright (C) 2013 Renesas Solutions Corp.

 * Copyright (C) 2013 Simon Horman

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



/include/ "skeleton.dtsi"



/ {

	compatible = "renesas,r8a7778";



	cpus {

		cpu@0 {

			compatible = "arm,cortex-a9";

		};

	};



	gic: interrupt-controller@fe438000 {

		compatible = "arm,cortex-a9-gic";

		#interrupt-cells = <3>;

		interrupt-controller;

		reg = <0xfe438000 0x1000>,

		      <0xfe430000 0x100>;

	};

};

arch/arm/boot/dts/r8a7779.dtsi

0 → 100644
+98 −0
Original line number Diff line number Diff line 
/*

 * Device Tree Source for Renesas r8a7779

 *

 * Copyright (C) 2013 Renesas Solutions Corp.

 * Copyright (C) 2013 Simon Horman

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



/include/ "skeleton.dtsi"



/ {

	compatible = "renesas,r8a7779";



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <0>;

		};

		cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <1>;

		};

		cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <2>;

		};

		cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <3>;

		};

	};



        gic: interrupt-controller@f0001000 {

                compatible = "arm,cortex-a9-gic";

                #interrupt-cells = <3>;

                interrupt-controller;

                reg = <0xf0001000 0x1000>,

                      <0xf0000100 0x100>;

        };



	i2c0: i2c@0xffc70000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,rmobile-iic";

		reg = <0xffc70000 0x1000>;

		interrupt-parent = <&gic>;

		interrupts = <0 79 0x4>;

	};



	i2c1: i2c@0xffc71000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,rmobile-iic";

		reg = <0xffc71000 0x1000>;

		interrupt-parent = <&gic>;

		interrupts = <0 82 0x4>;

	};



	i2c2: i2c@0xffc72000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,rmobile-iic";

		reg = <0xffc72000 0x1000>;

		interrupt-parent = <&gic>;

		interrupts = <0 80 0x4>;

	};



	i2c3: i2c@0xffc73000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,rmobile-iic";

		reg = <0xffc73000 0x1000>;

		interrupt-parent = <&gic>;

		interrupts = <0 81 0x4>;

	};



	thermal@ffc48000 {

		compatible = "renesas,rcar-thermal";

		reg = <0xffc48000 0x38>;

	};



	sata: sata@fc600000 {

		compatible = "renesas,rcar-sata";

		reg = <0xfc600000 0x2000>;

		interrupt-parent = <&gic>;

		interrupts = <0 100 0x4>;

	};

};

arch/arm/boot/dts/r8a7790.dtsi

0 → 100644
+63 −0
Original line number Diff line number Diff line 
/*

 * Device Tree Source for the r8a7790 SoC

 *

 * Copyright (C) 2013 Renesas Solutions Corp.

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



/ {

	compatible = "renesas,r8a7790";

	interrupt-parent = <&gic>;

	#address-cells = <2>;

	#size-cells = <2>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a15";

			reg = <0>;

			clock-frequency = <1300000000>;

		};

	};



	gic: interrupt-controller@f1001000 {

		compatible = "arm,cortex-a15-gic";

		#interrupt-cells = <3>;

		#address-cells = <0>;

		interrupt-controller;

		reg = <0 0xf1001000 0 0x1000>,

			<0 0xf1002000 0 0x1000>,

			<0 0xf1004000 0 0x2000>,

			<0 0xf1006000 0 0x2000>;

		interrupts = <1 9 0xf04>;



		gic-cpuif@4 {

			compatible = "arm,gic-cpuif";

			cpuif-id = <4>;

			cpu = <&cpu0>;

		};

	};



	timer {

		compatible = "arm,armv7-timer";

		interrupts = <1 13 0xf08>,

				<1 14 0xf08>,

				<1 11 0xf08>,

				<1 10 0xf08>;

	};



	irqc0: interrupt-controller@e61c0000 {

		compatible = "renesas,irqc";

		#interrupt-cells = <2>;

		interrupt-controller;

		reg = <0 0xe61c0000 0 0x200>;

		interrupt-parent = <&gic>;

		interrupts = <0 0 4>, <0 1 4>, <0 2 4>,	<0 3 4>;

	};

};