Loading drivers/platform/msm/ep_pcie/ep_pcie_core.c +2 −0 Original line number Diff line number Diff line Loading @@ -1270,6 +1270,8 @@ checkbme: EP_PCIE_DBG(dev, "PCIe V%d: EP_PCIE_OPT_ENUM_ASYNC is true.\n", dev->rev); bme = readl_relaxed(dev->dm_core + PCIE20_COMMAND_STATUS) & BIT(2); } if (bme) { Loading Loading
drivers/platform/msm/ep_pcie/ep_pcie_core.c +2 −0 Original line number Diff line number Diff line Loading @@ -1270,6 +1270,8 @@ checkbme: EP_PCIE_DBG(dev, "PCIe V%d: EP_PCIE_OPT_ENUM_ASYNC is true.\n", dev->rev); bme = readl_relaxed(dev->dm_core + PCIE20_COMMAND_STATUS) & BIT(2); } if (bme) { Loading