Loading drivers/clk/msm/clock-gcc-californium.c +3 −7 Original line number Diff line number Diff line Loading @@ -182,8 +182,6 @@ static DEFINE_VDD_REGULATORS(vdd_dig_ao, VDD_DIG_NUM, 1, vdd_corner, NULL); DEFINE_CLK_RPM_SMD_BRANCH(xo, xo_a_clk, RPM_MISC_CLK_TYPE, XO_ID, 19200000); DEFINE_CLK_RPM_SMD_BRANCH(cxo_clk_src, cxo_a_clk_src, RPM_MISC_CLK_TYPE, CXO_CLK_SRC_ID, 19200000); DEFINE_CLK_RPM_SMD(ce_clk, ce_a_clk, RPM_CE_CLK_TYPE, CE_CLK_ID, NULL); Loading Loading @@ -214,9 +212,9 @@ static DEFINE_CLK_VOTER(qseecom_ce_clk, &ce_clk.c, 85710000); static DEFINE_CLK_VOTER(scm_ce_clk, &ce_clk.c, 85710000); static DEFINE_CLK_VOTER(snoc_msmbus_clk, &snoc_clk.c, LONG_MAX); static DEFINE_CLK_VOTER(snoc_msmbus_a_clk, &snoc_a_clk.c, LONG_MAX); static DEFINE_CLK_BRANCH_VOTER(cxo_dwc3_clk, &cxo_clk_src.c); static DEFINE_CLK_BRANCH_VOTER(cxo_lpm_clk, &cxo_clk_src.c); static DEFINE_CLK_BRANCH_VOTER(cxo_otg_clk, &cxo_clk_src.c); static DEFINE_CLK_BRANCH_VOTER(cxo_dwc3_clk, &xo.c); static DEFINE_CLK_BRANCH_VOTER(cxo_lpm_clk, &xo.c); static DEFINE_CLK_BRANCH_VOTER(cxo_otg_clk, &xo.c); DEFINE_CLK_RPM_SMD_XO_BUFFER(div_clk1, div_clk1_ao, DIV_CLK1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(ln_bb_clk, ln_bb_a_clk, LN_BB_CLK_ID); Loading Loading @@ -1374,8 +1372,6 @@ static struct clk_lookup msm_clocks_rpm_californium[] = { CLK_LIST(a7pll_clk), CLK_LIST(xo), CLK_LIST(xo_a_clk), CLK_LIST(cxo_clk_src), CLK_LIST(cxo_a_clk_src), CLK_LIST(ce_clk), CLK_LIST(ce_a_clk), CLK_LIST(pcnoc_clk), Loading include/dt-bindings/clock/msm-clocks-californium.h +0 −2 Original line number Diff line number Diff line Loading @@ -17,8 +17,6 @@ /* RPM controlled clocks */ #define clk_xo 0xf13dfee3 #define clk_xo_a_clk 0xd939b99b #define clk_cxo_clk_src 0x79e95308 #define clk_cxo_a_clk_src 0x3dba80d6 #define clk_ce_clk 0xd8bc64e1 #define clk_ce_a_clk 0x4dfefd47 #define clk_pcnoc_clk 0xc1296d0f Loading Loading
drivers/clk/msm/clock-gcc-californium.c +3 −7 Original line number Diff line number Diff line Loading @@ -182,8 +182,6 @@ static DEFINE_VDD_REGULATORS(vdd_dig_ao, VDD_DIG_NUM, 1, vdd_corner, NULL); DEFINE_CLK_RPM_SMD_BRANCH(xo, xo_a_clk, RPM_MISC_CLK_TYPE, XO_ID, 19200000); DEFINE_CLK_RPM_SMD_BRANCH(cxo_clk_src, cxo_a_clk_src, RPM_MISC_CLK_TYPE, CXO_CLK_SRC_ID, 19200000); DEFINE_CLK_RPM_SMD(ce_clk, ce_a_clk, RPM_CE_CLK_TYPE, CE_CLK_ID, NULL); Loading Loading @@ -214,9 +212,9 @@ static DEFINE_CLK_VOTER(qseecom_ce_clk, &ce_clk.c, 85710000); static DEFINE_CLK_VOTER(scm_ce_clk, &ce_clk.c, 85710000); static DEFINE_CLK_VOTER(snoc_msmbus_clk, &snoc_clk.c, LONG_MAX); static DEFINE_CLK_VOTER(snoc_msmbus_a_clk, &snoc_a_clk.c, LONG_MAX); static DEFINE_CLK_BRANCH_VOTER(cxo_dwc3_clk, &cxo_clk_src.c); static DEFINE_CLK_BRANCH_VOTER(cxo_lpm_clk, &cxo_clk_src.c); static DEFINE_CLK_BRANCH_VOTER(cxo_otg_clk, &cxo_clk_src.c); static DEFINE_CLK_BRANCH_VOTER(cxo_dwc3_clk, &xo.c); static DEFINE_CLK_BRANCH_VOTER(cxo_lpm_clk, &xo.c); static DEFINE_CLK_BRANCH_VOTER(cxo_otg_clk, &xo.c); DEFINE_CLK_RPM_SMD_XO_BUFFER(div_clk1, div_clk1_ao, DIV_CLK1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(ln_bb_clk, ln_bb_a_clk, LN_BB_CLK_ID); Loading Loading @@ -1374,8 +1372,6 @@ static struct clk_lookup msm_clocks_rpm_californium[] = { CLK_LIST(a7pll_clk), CLK_LIST(xo), CLK_LIST(xo_a_clk), CLK_LIST(cxo_clk_src), CLK_LIST(cxo_a_clk_src), CLK_LIST(ce_clk), CLK_LIST(ce_a_clk), CLK_LIST(pcnoc_clk), Loading
include/dt-bindings/clock/msm-clocks-californium.h +0 −2 Original line number Diff line number Diff line Loading @@ -17,8 +17,6 @@ /* RPM controlled clocks */ #define clk_xo 0xf13dfee3 #define clk_xo_a_clk 0xd939b99b #define clk_cxo_clk_src 0x79e95308 #define clk_cxo_a_clk_src 0x3dba80d6 #define clk_ce_clk 0xd8bc64e1 #define clk_ce_a_clk 0x4dfefd47 #define clk_pcnoc_clk 0xc1296d0f Loading