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Commit 2d959e95 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-fixes-for-linus' of... 

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86/agp: Fix agp_amd64_init() initialization with CONFIG_GART_IOMMU enabled
  x86: SGI UV: Fix writes to led registers on remote uv hubs
  x86, kmemcheck: Use KERN_WARNING for error reporting
  x86: Use KERN_DEFAULT log-level in __show_regs()
  x86, compress: Force i386 instructions for the decompressor
  x86/amd-iommu: Fix initialization failure panic
  dma-debug: Do not add notifier when dma debugging is disabled.
  x86: Fix objdump version check in chkobjdump.awk for different formats.

Trivial conflicts in arch/x86/include/asm/uv/uv_hub.h due to me having
applied an earlier version of an SGI UV fix.
parents 9d6e323c f405d2c0

arch/x86/boot/compressed/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinu 
KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2

KBUILD_CFLAGS += -fno-strict-aliasing -fPIC

KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING

cflags-$(CONFIG_X86_32) := -march=i386

cflags-$(CONFIG_X86_64) := -mcmodel=small

KBUILD_CFLAGS += $(cflags-y)

KBUILD_CFLAGS += $(call cc-option,-ffreestanding)

arch/x86/include/asm/uv/uv_hub.h

+33 −41
Original line number Diff line number Diff line
@@ -287,21 +287,18 @@ static inline int uv_apicid_to_pnode(int apicid) 
 * Access global MMRs using the low memory MMR32 space. This region supports

 * faster MMR access but not all MMRs are accessible in this space.

 */

static inline unsigned long *uv_global_mmr32_address(int pnode,

				unsigned long offset)

static inline unsigned long *uv_global_mmr32_address(int pnode, unsigned long offset)

{

	return __va(UV_GLOBAL_MMR32_BASE |

		       UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset);

}



static inline void uv_write_global_mmr32(int pnode, unsigned long offset,

				 unsigned long val)

static inline void uv_write_global_mmr32(int pnode, unsigned long offset, unsigned long val)

{

	writeq(val, uv_global_mmr32_address(pnode, offset));

}



static inline unsigned long uv_read_global_mmr32(int pnode,

						 unsigned long offset)

static inline unsigned long uv_read_global_mmr32(int pnode, unsigned long offset)

{

	return readq(uv_global_mmr32_address(pnode, offset));

}
@@ -310,21 +307,18 @@ static inline unsigned long uv_read_global_mmr32(int pnode, 
 * Access Global MMR space using the MMR space located at the top of physical

 * memory.

 */

static inline unsigned long *uv_global_mmr64_address(int pnode,

				unsigned long offset)

static inline unsigned long *uv_global_mmr64_address(int pnode, unsigned long offset)

{

	return __va(UV_GLOBAL_MMR64_BASE |

		    UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset);

}



static inline void uv_write_global_mmr64(int pnode, unsigned long offset,

				unsigned long val)

static inline void uv_write_global_mmr64(int pnode, unsigned long offset, unsigned long val)

{

	writeq(val, uv_global_mmr64_address(pnode, offset));

}



static inline unsigned long uv_read_global_mmr64(int pnode,

						 unsigned long offset)

static inline unsigned long uv_read_global_mmr64(int pnode, unsigned long offset)

{

	return readq(uv_global_mmr64_address(pnode, offset));

}
@@ -338,14 +332,12 @@ static inline unsigned long uv_global_gru_mmr_address(int pnode, unsigned long o 
	return UV_GLOBAL_GRU_MMR_BASE | offset | (pnode << uv_hub_info->m_val);

}



static inline void uv_write_global_mmr8(int pnode, unsigned long offset,

				unsigned char val)

static inline void uv_write_global_mmr8(int pnode, unsigned long offset, unsigned char val)

{

	writeb(val, uv_global_mmr64_address(pnode, offset));

}



static inline unsigned char uv_read_global_mmr8(int pnode,

						 unsigned long offset)

static inline unsigned char uv_read_global_mmr8(int pnode, unsigned long offset)

{

	return readb(uv_global_mmr64_address(pnode, offset));

}

arch/x86/kernel/amd_iommu_init.c

+10 −0
Original line number Diff line number Diff line
@@ -137,6 +137,11 @@ int amd_iommus_present; 
/* IOMMUs have a non-present cache? */

bool amd_iommu_np_cache __read_mostly;



/*

 * Set to true if ACPI table parsing and hardware intialization went properly

 */

static bool amd_iommu_initialized;



/*

 * List of protection domains - used during resume

 */
@@ -929,6 +934,8 @@ static int __init init_iommu_all(struct acpi_table_header *table) 
	}

	WARN_ON(p != end);



	amd_iommu_initialized = true;



	return 0;

}
@@ -1263,6 +1270,9 @@ static int __init amd_iommu_init(void) 
	if (acpi_table_parse("IVRS", init_iommu_all) != 0)

		goto free;



	if (!amd_iommu_initialized)

		goto free;



	if (acpi_table_parse("IVRS", init_memory_definitions) != 0)

		goto free;

arch/x86/kernel/process.c

+2 −2
Original line number Diff line number Diff line
@@ -103,8 +103,8 @@ void show_regs_common(void) 
	if (!product)

		product = "";



	printk("\n");

	printk(KERN_INFO "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n",

	printk(KERN_CONT "\n");

	printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n",

		current->pid, current->comm, print_tainted(),

		init_utsname()->release,

		(int)strcspn(init_utsname()->version, " "),

arch/x86/kernel/process_32.c

+7 −7
Original line number Diff line number Diff line
@@ -139,16 +139,16 @@ void __show_regs(struct pt_regs *regs, int all) 


	show_regs_common();



	printk("EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n",

	printk(KERN_DEFAULT "EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n",

			(u16)regs->cs, regs->ip, regs->flags,

			smp_processor_id());

	print_symbol("EIP is at %s\n", regs->ip);



	printk("EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",

	printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",

		regs->ax, regs->bx, regs->cx, regs->dx);

	printk("ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",

	printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",

		regs->si, regs->di, regs->bp, sp);

	printk(" DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",

	printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",

	       (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss);



	if (!all)
@@ -158,19 +158,19 @@ void __show_regs(struct pt_regs *regs, int all) 
	cr2 = read_cr2();

	cr3 = read_cr3();

	cr4 = read_cr4_safe();

	printk("CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",

	printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",

			cr0, cr2, cr3, cr4);



	get_debugreg(d0, 0);

	get_debugreg(d1, 1);

	get_debugreg(d2, 2);

	get_debugreg(d3, 3);

	printk("DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",

	printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",

			d0, d1, d2, d3);



	get_debugreg(d6, 6);

	get_debugreg(d7, 7);

	printk("DR6: %08lx DR7: %08lx\n",

	printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n",

			d6, d7);

}