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Commit 2d7caefb authored by Sujith Manoharan's avatar Sujith Manoharan Committed by John W. Linville
Browse files

ath9k_hw: Add TempCompensation feature for AR9550 



Signed-off-by: default avatarSujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 3a6a62fb

drivers/net/wireless/ath/ath9k/ar9003_eeprom.c

+99 −29
Original line number Diff line number Diff line
@@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah, 
	return 0;

}



static int ar9003_hw_power_control_override(struct ath_hw *ah,

static void ar9003_hw_power_control_override(struct ath_hw *ah,

					     int frequency,

					     int *correction,

					     int *voltage, int *temperature)

{

	int tempSlope = 0;

	int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0;

	struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;

	int f[8], t[8], i;

	int f[8], t[8], t1[3], t2[3], i;



	REG_RMW(ah, AR_PHY_TPC_11_B0,

		(correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
@@ -4624,14 +4624,41 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah, 
	 * enable temperature compensation

	 * Need to use register names

	 */

	if (frequency < 4000)

		tempSlope = eep->modalHeader2G.tempSlope;

	else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {

	if (frequency < 4000) {

		temp_slope = eep->modalHeader2G.tempSlope;

	} else {

		if (AR_SREV_9550(ah)) {

			t[0] = eep->base_ext1.tempslopextension[2];

			t1[0] = eep->base_ext1.tempslopextension[3];

			t2[0] = eep->base_ext1.tempslopextension[4];

			f[0] = 5180;



			t[1] = eep->modalHeader5G.tempSlope;

			t1[1] = eep->base_ext1.tempslopextension[0];

			t2[1] = eep->base_ext1.tempslopextension[1];

			f[1] = 5500;



			t[2] = eep->base_ext1.tempslopextension[5];

			t1[2] = eep->base_ext1.tempslopextension[6];

			t2[2] = eep->base_ext1.tempslopextension[7];

			f[2] = 5785;



			temp_slope = ar9003_hw_power_interpolate(frequency,

								 f, t, 3);

			temp_slope1 = ar9003_hw_power_interpolate(frequency,

								   f, t1, 3);

			temp_slope2 = ar9003_hw_power_interpolate(frequency,

								   f, t2, 3);



			goto tempslope;

		}



		if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {

			for (i = 0; i < 8; i++) {

				t[i] = eep->base_ext1.tempslopextension[i];

				f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);

			}

		tempSlope = ar9003_hw_power_interpolate((s32) frequency,

			temp_slope = ar9003_hw_power_interpolate((s32) frequency,

								 f, t, 8);

		} else if (eep->base_ext2.tempSlopeLow != 0) {

			t[0] = eep->base_ext2.tempSlopeLow;
@@ -4640,22 +4667,65 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah, 
			f[1] = 5500;

			t[2] = eep->base_ext2.tempSlopeHigh;

			f[2] = 5785;

		tempSlope = ar9003_hw_power_interpolate((s32) frequency,

			temp_slope = ar9003_hw_power_interpolate((s32) frequency,

								 f, t, 3);

	} else

		tempSlope = eep->modalHeader5G.tempSlope;

		} else {

			temp_slope = eep->modalHeader5G.tempSlope;

		}

	}



	REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);

tempslope:

	if (AR_SREV_9550(ah)) {

		/*

		 * AR955x has tempSlope register for each chain.

		 * Check whether temp_compensation feature is enabled or not.

		 */

		if (eep->baseEepHeader.featureEnable & 0x1) {

			if (frequency < 4000) {

				REG_RMW_FIELD(ah, AR_PHY_TPC_19,

					      AR_PHY_TPC_19_ALPHA_THERM,

					      eep->base_ext2.tempSlopeLow);

				REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,

					      AR_PHY_TPC_19_ALPHA_THERM,

					      temp_slope);

				REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,

					      AR_PHY_TPC_19_ALPHA_THERM,

					      eep->base_ext2.tempSlopeHigh);

			} else {

				REG_RMW_FIELD(ah, AR_PHY_TPC_19,

					      AR_PHY_TPC_19_ALPHA_THERM,

					      temp_slope);

				REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,

					      AR_PHY_TPC_19_ALPHA_THERM,

					      temp_slope1);

				REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,

					      AR_PHY_TPC_19_ALPHA_THERM,

					      temp_slope2);

			}

		} else {

			/*

			 * If temp compensation is not enabled,

			 * set all registers to 0.

			 */

			REG_RMW_FIELD(ah, AR_PHY_TPC_19,

				      AR_PHY_TPC_19_ALPHA_THERM, 0);

			REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,

				      AR_PHY_TPC_19_ALPHA_THERM, 0);

			REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,

				      AR_PHY_TPC_19_ALPHA_THERM, 0);

		}

	} else {

		REG_RMW_FIELD(ah, AR_PHY_TPC_19,

			      AR_PHY_TPC_19_ALPHA_THERM, temp_slope);

	}



	if (AR_SREV_9462_20(ah))

		REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,

			      AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);

			      AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);





	REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,

		      temperature[0]);



	return 0;

}



/* Apply the recorded correction values. */

drivers/net/wireless/ath/ath9k/ar9003_phy.h

+1 −1
Original line number Diff line number Diff line
@@ -1028,7 +1028,7 @@ 
#define AR_PHY_TPC_5_B2          (AR_SM2_BASE + 0x208)

#define AR_PHY_TPC_6_B2          (AR_SM2_BASE + 0x20c)

#define AR_PHY_TPC_11_B2         (AR_SM2_BASE + 0x220)

#define AR_PHY_PDADC_TAB_2       (AR_SM2_BASE + 0x240)

#define AR_PHY_TPC_19_B2         (AR_SM2_BASE + 0x240)

#define AR_PHY_TX_IQCAL_STATUS_B2   (AR_SM2_BASE + 0x48c)

#define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i)    (AR_SM2_BASE + 0x450 + ((_i) << 2))