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Commit 2c80f773 authored by Ard Biesheuvel's avatar Ard Biesheuvel Committed by Gerrit - the friendly Code Review server
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UPSTREAM: arm64: introduce mov_q macro to move a constant into a 64-bit register 



Implement a macro mov_q that can be used to move an immediate constant
into a 64-bit register, using between 2 and 4 movz/movk instructions
(depending on the operand)

Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
(cherry picked from commit 30b5ba5cf333cc650e474eaf2cc1ae91bc7cf89f)
Signed-off-by: default avatarGreg Hackmann <ghackmann@google.com>
Change-Id: Ib7db6db569cfda7ce19bb2f9fc4cf336e862cd1d
Git-Commit: 76ec6821
Git-repo: git://android.googlesource.com/kernel/common.git


Signed-off-by: default avatarVinayak Menon <vinmenon@codeaurora.org>
parent c46c9020

arch/arm64/include/asm/assembler.h

+20 −0
Original line number Diff line number Diff line
@@ -321,4 +321,24 @@ lr .req x30 // link register 
	mrs	\rd, sp_el0

	.endm



	/*

	 * mov_q - move an immediate constant into a 64-bit register using

	 *         between 2 and 4 movz/movk instructions (depending on the

	 *         magnitude and sign of the operand)

	 */

	.macro	mov_q, reg, val

	.if (((\val) >> 31) == 0 || ((\val) >> 31) == 0x1ffffffff)

	movz	\reg, :abs_g1_s:\val

	.else

	.if (((\val) >> 47) == 0 || ((\val) >> 47) == 0x1ffff)

	movz	\reg, :abs_g2_s:\val

	.else

	movz	\reg, :abs_g3:\val

	movk	\reg, :abs_g2_nc:\val

	.endif

	movk	\reg, :abs_g1_nc:\val

	.endif

	movk	\reg, :abs_g0_nc:\val

	.endm



#endif	/* __ASM_ASSEMBLER_H */