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Commit 2bf81c8a authored by Al Viro's avatar Al Viro
Browse files

Merge branch 'arch-microblaze' into no-rebases

parents 9526d9bc 5f6c4ab6

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 3

PATCHLEVEL = 7

SUBLEVEL = 0

EXTRAVERSION = -rc4

EXTRAVERSION = -rc5

NAME = Terrified Chipmunk



# *DOCUMENTATION*

arch/arm/include/asm/io.h

+2 −2
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); 
static inline void __raw_writew(u16 val, volatile void __iomem *addr)

{

	asm volatile("strh %1, %0"

		     : "+Qo" (*(volatile u16 __force *)addr)

		     : "+Q" (*(volatile u16 __force *)addr)

		     : "r" (val));

}
@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr) 
{

	u16 val;

	asm volatile("ldrh %1, %0"

		     : "+Qo" (*(volatile u16 __force *)addr),

		     : "+Q" (*(volatile u16 __force *)addr),

		       "=r" (val));

	return val;

}

arch/arm/include/asm/sched_clock.h

+0 −2
Original line number Diff line number Diff line
@@ -10,7 +10,5 @@ 


extern void sched_clock_postinit(void);

extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);

extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,

		unsigned long rate);



#endif

arch/arm/include/asm/vfpmacros.h

+6 −6
Original line number Diff line number Diff line
@@ -27,9 +27,9 @@ 
#if __LINUX_ARM_ARCH__ <= 6

	ldr	\tmp, =elf_hwcap		    @ may not have MVFR regs

	ldr	\tmp, [\tmp, #0]

	tst	\tmp, #HWCAP_VFPv3D16

	ldceql	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d16-d31}

	addne	\base, \base, #32*4		    @ step over unused register space

	tst	\tmp, #HWCAP_VFPD32

	ldcnel	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d16-d31}

	addeq	\base, \base, #32*4		    @ step over unused register space

#else

	VFPFMRX	\tmp, MVFR0			    @ Media and VFP Feature Register 0

	and	\tmp, \tmp, #MVFR0_A_SIMD_MASK	    @ A_SIMD field
@@ -51,9 +51,9 @@ 
#if __LINUX_ARM_ARCH__ <= 6

	ldr	\tmp, =elf_hwcap		    @ may not have MVFR regs

	ldr	\tmp, [\tmp, #0]

	tst	\tmp, #HWCAP_VFPv3D16

	stceql	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d16-d31}

	addne	\base, \base, #32*4		    @ step over unused register space

	tst	\tmp, #HWCAP_VFPD32

	stcnel	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d16-d31}

	addeq	\base, \base, #32*4		    @ step over unused register space

#else

	VFPFMRX	\tmp, MVFR0			    @ Media and VFP Feature Register 0

	and	\tmp, \tmp, #MVFR0_A_SIMD_MASK	    @ A_SIMD field

arch/arm/include/uapi/asm/hwcap.h

+2 −1
Original line number Diff line number Diff line
@@ -18,11 +18,12 @@ 
#define HWCAP_THUMBEE	(1 << 11)

#define HWCAP_NEON	(1 << 12)

#define HWCAP_VFPv3	(1 << 13)

#define HWCAP_VFPv3D16	(1 << 14)

#define HWCAP_VFPv3D16	(1 << 14)	/* also set for VFPv4-D16 */

#define HWCAP_TLS	(1 << 15)

#define HWCAP_VFPv4	(1 << 16)

#define HWCAP_IDIVA	(1 << 17)

#define HWCAP_IDIVT	(1 << 18)

#define HWCAP_VFPD32	(1 << 19)	/* set if VFP has 32 regs (not 16) */

#define HWCAP_IDIV	(HWCAP_IDIVA | HWCAP_IDIVT)