Merge "ARM: dts: msm: Add changes to enable TDM feature in APQ8017" (2b9fb8cf) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/apq8017-no-pmi-wcd-rome-cdp.dts

+265 −0

Original line number	Diff line number	Diff line
		@@ -174,6 +174,20 @@
		status = "okay";
		qcom,msm-mbhc-hphl-swh = <1>;
		qcom,msm-mbhc-gnd-swh = <1>;
		reg = <0xc051000 0x4>,
		<0xc051004 0x4>,
		<0xc055000 0x4>,
		<0xc052000 0x4>,
		<0x0c056000 0x4>,
		<0x0c054000 0x4>,
		<0x0c053000 0x4>;
		reg-names = "csr_gp_io_mux_mic_ctl",
		"csr_gp_io_mux_spkr_ctl",
		"csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel",
		"csr_gp_io_mux_quin_ctl",
		"csr_gp_io_lpaif_qui_pcm_sec_mode_muxsel",
		"csr_gp_io_mux_mic_ext_clk_ctl",
		"csr_gp_io_mux_sec_tlmm_ctl";
		qcom,audio-routing =
		"AIF4 VI", "MCLK",
		"AIF4 VI", "MICBIAS_REGULATOR",
		@@ -208,6 +222,157 @@
		"MIC BIAS4", "MICBIAS_REGULATOR",
		"SpkrLeft IN", "SPK1 OUT",
		"SpkrRight IN", "SPK2 OUT";
		asoc-cpu = <&dai_pri_auxpcm>,
		<&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s5>,
		<&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,
		<&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>,
		<&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>,
		<&afe_pcm_rx>, <&afe_pcm_tx>,
		<&afe_proxy_rx>, <&afe_proxy_tx>,
		<&incall_record_rx>, <&incall_record_tx>,
		<&incall_music_rx>, <&incall_music_2_rx>,
		<&sb_5_rx>, <&bt_sco_rx>,
		<&bt_sco_tx>, <&int_fm_rx>, <&int_fm_tx>,
		<&sb_6_rx>, <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
		<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>;
		asoc-cpu-names = "msm-dai-q6-auxpcm.1",
		"msm-dai-q6-mi2s.2",
		"msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.5",
		"msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",
		"msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",
		"msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389",
		"msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391",
		"msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393",
		"msm-dai-q6-dev.16395", "msm-dai-q6-dev.224",
		"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
		"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
		"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
		"msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394",
		"msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289",
		"msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293",
		"msm-dai-q6-dev.16396", "msm-dai-q6-tdm.36864",
		"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36880",
		"msm-dai-q6-tdm.36881";
		qcom,msm-gpios =
		"quin_i2s",
		"us_eu_gpio",
		"sec_tdm",
		"pri_tdm";
		qcom,pinctrl-names =
		"all_off",
		"quin_act",
		"us_eu_gpio_act",
		"quin_us_eu_gpio_act",
		"sec_tdm_act",
		"sec_tdm_quin_i2s_act",
		"sec_tdm_us_eu_gpio_act",
		"sec_tdm_us_eu_gpio_quin_i2s_act",
		"pri_tdm_act",
		"pri_tdm_quin_i2s_act",
		"pri_tdm_us_eu_gpio_act",
		"pri_tdm_quin_i2s_us_eu_gpio_act",
		"pri_tdm_sec_tdm_act",
		"pri_tdm_sec_tdm_quin_i2s__act",
		"pri_tdm_sec_tdm_us_eu_gpio__act",
		"pri_tdm_sec_tdm__us_eu_gpio_quin_i2s_act";
		pinctrl-names =
		"all_off",
		"quin_act",
		"us_eu_gpio_act",
		"quin_us_eu_gpio_act",
		"sec_tdm_act",
		"sec_tdm_quin_i2s_act",
		"sec_tdm_us_eu_gpio_act",
		"sec_tdm_us_eu_gpio_quin_i2s_act",
		"pri_tdm_act",
		"pri_tdm_quin_i2s_act",
		"pri_tdm_us_eu_gpio_act",
		"pri_tdm_quin_i2s_us_eu_gpio_act",
		"pri_tdm_sec_tdm_act",
		"pri_tdm_sec_tdm_quin_i2s__act",
		"pri_tdm_sec_tdm_us_eu_gpio__act",
		"pri_tdm_sec_tdm__us_eu_gpio_quin_i2s_act";

		pinctrl-0 = <&pri_tlmm_ws_sus
		&cross_conn_det_sus &pri_mi2s_sd0_sleep
		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-1 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-2 = <&pri_tlmm_ws_sus
		&cross_conn_det_act &pri_mi2s_sd0_sleep
		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-3 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-4 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-5 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-6 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-7 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-8 = <&pri_tlmm_ws_sus
		&cross_conn_det_sus &pri_mi2s_sd0_sleep
		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-9 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-10 = <&pri_tlmm_ws_sus
		&cross_conn_det_act &pri_mi2s_sd0_sleep
		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-11 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-12 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-13 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-14 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-15 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		};

		&slim_msm {
		@@ -225,3 +390,103 @@
		&wcd_rst_gpio {
		status = "okay";
		};

		&soc {
		qcom,msm-dai-tdm-pri-rx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37120>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36864>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		dai_pri_tdm_rx_0: qcom,msm-dai-q6-tdm-pri-rx-0 {
		compatible = "qcom,msm-dai-q6-tdm";
		qcom,msm-cpudai-tdm-dev-id = <36864>;
		qcom,msm-cpudai-tdm-sync-mode = <0>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		qcom,msm-cpudai-tdm-data-out = <0>;
		qcom,msm-cpudai-tdm-invert-sync = <0>;
		qcom,msm-cpudai-tdm-data-delay = <1>;
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};

		qcom,msm-dai-tdm-pri-tx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37121>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36865>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		dai_pri_tdm_tx_0: qcom,msm-dai-q6-tdm-pri-tx-0 {
		compatible = "qcom,msm-dai-q6-tdm";
		qcom,msm-cpudai-tdm-dev-id = <36865>;
		qcom,msm-cpudai-tdm-sync-mode = <0>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		qcom,msm-cpudai-tdm-data-out = <0>;
		qcom,msm-cpudai-tdm-invert-sync = <0>;
		qcom,msm-cpudai-tdm-data-delay = <1>;
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};

		qcom,msm-dai-tdm-sec-rx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37136>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36880>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		dai_sec_tdm_rx_0: qcom,msm-dai-q6-tdm-sec-rx-0 {
		compatible = "qcom,msm-dai-q6-tdm";
		qcom,msm-cpudai-tdm-dev-id = <36880>;
		qcom,msm-cpudai-tdm-sync-mode = <0>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		qcom,msm-cpudai-tdm-data-out = <0>;
		qcom,msm-cpudai-tdm-invert-sync = <0>;
		qcom,msm-cpudai-tdm-data-delay = <1>;
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};

		qcom,msm-dai-tdm-sec-tx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37137>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36881>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		dai_sec_tdm_tx_0: qcom,msm-dai-q6-tdm-sec-tx-0 {
		compatible = "qcom,msm-dai-q6-tdm";
		qcom,msm-cpudai-tdm-dev-id = <36881>;
		qcom,msm-cpudai-tdm-sync-mode = <0>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		qcom,msm-cpudai-tdm-data-out = <0>;
		qcom,msm-cpudai-tdm-invert-sync = <0>;
		qcom,msm-cpudai-tdm-data-delay = <1>;
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};
		};

		&tlmm {
		tlmm_gpio_key {
		gpio_key_active: gpio_key_active {
		mux {
		pins = "gpio91", "gpio127", "gpio128";
		function = "gpio";
		};

		config {
		pins = "gpio91", "gpio127", "gpio128";
		};
		};

		gpio_key_suspend: gpio_key_suspend {
		mux {
		pins = "gpio91", "gpio127", "gpio128";
		function = "gpio";
		};

		config {
		pins = "gpio91", "gpio127", "gpio128";
		};
		};
		};
		};

arch/arm/boot/dts/qcom/apq8017-pmi8937-cdp-wcd-rome.dts

+270 −2

Original line number	Diff line number	Diff line
		/*
		* Copyright (c) 2016, The Linux Foundation. All rights reserved.
		* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -136,6 +136,20 @@
		status = "okay";
		qcom,msm-mbhc-hphl-swh = <1>;
		qcom,msm-mbhc-gnd-swh = <1>;
		reg = <0xc051000 0x4>,
		<0xc051004 0x4>,
		<0xc055000 0x4>,
		<0xc052000 0x4>,
		<0x0c056000 0x4>,
		<0x0c054000 0x4>,
		<0x0c053000 0x4>;
		reg-names = "csr_gp_io_mux_mic_ctl",
		"csr_gp_io_mux_spkr_ctl",
		"csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel",
		"csr_gp_io_mux_quin_ctl",
		"csr_gp_io_lpaif_qui_pcm_sec_mode_muxsel",
		"csr_gp_io_mux_mic_ext_clk_ctl",
		"csr_gp_io_mux_sec_tlmm_ctl";
		qcom,audio-routing =
		"AIF4 VI", "MCLK",
		"AIF4 VI", "MICBIAS_REGULATOR",
		@@ -170,7 +184,157 @@
		"MIC BIAS4", "MICBIAS_REGULATOR",
		"SpkrLeft IN", "SPK1 OUT",
		"SpkrRight IN", "SPK2 OUT";

		asoc-cpu = <&dai_pri_auxpcm>,
		<&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s5>,
		<&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,
		<&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>,
		<&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>,
		<&afe_pcm_rx>, <&afe_pcm_tx>,
		<&afe_proxy_rx>, <&afe_proxy_tx>,
		<&incall_record_rx>, <&incall_record_tx>,
		<&incall_music_rx>, <&incall_music_2_rx>,
		<&sb_5_rx>, <&bt_sco_rx>,
		<&bt_sco_tx>, <&int_fm_rx>, <&int_fm_tx>,
		<&sb_6_rx>, <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
		<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>;
		asoc-cpu-names = "msm-dai-q6-auxpcm.1",
		"msm-dai-q6-mi2s.2",
		"msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.5",
		"msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",
		"msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",
		"msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389",
		"msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391",
		"msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393",
		"msm-dai-q6-dev.16395", "msm-dai-q6-dev.224",
		"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
		"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
		"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
		"msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394",
		"msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289",
		"msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293",
		"msm-dai-q6-dev.16396", "msm-dai-q6-tdm.36864",
		"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36880",
		"msm-dai-q6-tdm.36881";
		qcom,msm-gpios =
		"quin_i2s",
		"us_eu_gpio",
		"sec_tdm",
		"pri_tdm";
		qcom,pinctrl-names =
		"all_off",
		"quin_act",
		"us_eu_gpio_act",
		"quin_us_eu_gpio_act",
		"sec_tdm_act",
		"sec_tdm_quin_i2s_act",
		"sec_tdm_us_eu_gpio_act",
		"sec_tdm_us_eu_gpio_quin_i2s_act",
		"pri_tdm_act",
		"pri_tdm_quin_i2s_act",
		"pri_tdm_us_eu_gpio_act",
		"pri_tdm_quin_i2s_us_eu_gpio_act",
		"pri_tdm_sec_tdm_act",
		"pri_tdm_sec_tdm_quin_i2s__act",
		"pri_tdm_sec_tdm_us_eu_gpio__act",
		"pri_tdm_sec_tdm__us_eu_gpio_quin_i2s_act";
		pinctrl-names =
		"all_off",
		"quin_act",
		"us_eu_gpio_act",
		"quin_us_eu_gpio_act",
		"sec_tdm_act",
		"sec_tdm_quin_i2s_act",
		"sec_tdm_us_eu_gpio_act",
		"sec_tdm_us_eu_gpio_quin_i2s_act",
		"pri_tdm_act",
		"pri_tdm_quin_i2s_act",
		"pri_tdm_us_eu_gpio_act",
		"pri_tdm_quin_i2s_us_eu_gpio_act",
		"pri_tdm_sec_tdm_act",
		"pri_tdm_sec_tdm_quin_i2s__act",
		"pri_tdm_sec_tdm_us_eu_gpio__act",
		"pri_tdm_sec_tdm__us_eu_gpio_quin_i2s_act";

		pinctrl-0 = <&pri_tlmm_ws_sus
		&cross_conn_det_sus &pri_mi2s_sd0_sleep
		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-1 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-2 = <&pri_tlmm_ws_sus
		&cross_conn_det_act &pri_mi2s_sd0_sleep
		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-3 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-4 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-5 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-6 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-7 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep
		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;
		pinctrl-8 = <&pri_tlmm_ws_sus
		&cross_conn_det_sus &pri_mi2s_sd0_sleep
		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-9 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-10 = <&pri_tlmm_ws_sus
		&cross_conn_det_act &pri_mi2s_sd0_sleep
		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-11 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-12 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-13 = <&pri_tlmm_ws_act
		&cross_conn_det_sus &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-14 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		pinctrl-15 = <&pri_tlmm_ws_act
		&cross_conn_det_act &pri_mi2s_sd0_active
		&pri_mi2s_sck_active &pri_mi2s_sd1_active
		&sec_mi2s_ws_active &sec_mi2s_sck_active
		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;
		};

		&int_codec {
		@@ -200,3 +364,107 @@
		&wsa881x_i2c_45 {
		status = "disabled";
		};

		&soc {
		qcom,msm-dai-tdm-pri-rx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37120>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36864>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		dai_pri_tdm_rx_0: qcom,msm-dai-q6-tdm-pri-rx-0 {
		compatible = "qcom,msm-dai-q6-tdm";
		qcom,msm-cpudai-tdm-dev-id = <36864>;
		qcom,msm-cpudai-tdm-sync-mode = <0>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		qcom,msm-cpudai-tdm-data-out = <0>;
		qcom,msm-cpudai-tdm-invert-sync = <0>;
		qcom,msm-cpudai-tdm-data-delay = <1>;
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};

		qcom,msm-dai-tdm-pri-tx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37121>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36865>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		dai_pri_tdm_tx_0: qcom,msm-dai-q6-tdm-pri-tx-0 {
		compatible = "qcom,msm-dai-q6-tdm";
		qcom,msm-cpudai-tdm-dev-id = <36865>;
		qcom,msm-cpudai-tdm-sync-mode = <0>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		qcom,msm-cpudai-tdm-data-out = <0>;
		qcom,msm-cpudai-tdm-invert-sync = <0>;
		qcom,msm-cpudai-tdm-data-delay = <1>;
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};

		qcom,msm-dai-tdm-sec-rx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37136>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36880>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		dai_sec_tdm_rx_0: qcom,msm-dai-q6-tdm-sec-rx-0 {
		compatible = "qcom,msm-dai-q6-tdm";
		qcom,msm-cpudai-tdm-dev-id = <36880>;
		qcom,msm-cpudai-tdm-sync-mode = <0>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		qcom,msm-cpudai-tdm-data-out = <0>;
		qcom,msm-cpudai-tdm-invert-sync = <0>;
		qcom,msm-cpudai-tdm-data-delay = <1>;
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};

		qcom,msm-dai-tdm-sec-tx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37137>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36881>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		dai_sec_tdm_tx_0: qcom,msm-dai-q6-tdm-sec-tx-0 {
		compatible = "qcom,msm-dai-q6-tdm";
		qcom,msm-cpudai-tdm-dev-id = <36881>;
		qcom,msm-cpudai-tdm-sync-mode = <0>;
		qcom,msm-cpudai-tdm-sync-src = <1>;
		qcom,msm-cpudai-tdm-data-out = <0>;
		qcom,msm-cpudai-tdm-invert-sync = <0>;
		qcom,msm-cpudai-tdm-data-delay = <1>;
		qcom,msm-cpudai-tdm-data-align = <0>;
		};
		};

		gpio_keys {
		/delete-node/ home;
		};
		};

		&tlmm {
		tlmm_gpio_key {
		gpio_key_active: gpio_key_active {
		mux {
		pins = "gpio91", "gpio127", "gpio128";
		function = "gpio";
		};

		config {
		pins = "gpio91", "gpio127", "gpio128";
		};
		};

		gpio_key_suspend: gpio_key_suspend {
		mux {
		pins = "gpio91", "gpio127", "gpio128";
		function = "gpio";
		};

		config {
		pins = "gpio91", "gpio127", "gpio128";
		};
		};
		};
		};

arch/arm/boot/dts/qcom/apq8017-pmi8950-cdp-wcd-rome.dts

+270 −2

File changed.

Preview size limit exceeded, changes collapsed.

arch/arm/boot/dts/qcom/msm8917-pinctrl.dtsi

+203 −1

Original line number	Diff line number	Diff line
		@@ -985,7 +985,9 @@

		config {
		pins = "gpio87";
		drive-strength = <8>;
		drive-strength = <16>;
		bias-disable;
		output-high;
		};
		};

		@@ -999,6 +1001,7 @@
		pins = "gpio87";
		drive-strength = <2>;
		bias-pull-down;
		input-enable;
		};
		};
		};
		@@ -1361,5 +1364,204 @@
		bias-pull-up;
		};
		};

		pri_mi2s_sck {
		pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
		mux {
		pins = "gpio85";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio85";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_sck_active: pri_mi2s_sck_active {
		mux {
		pins = "gpio85";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio85";
		drive-strength = <16>; /* 16 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		pri_mi2s_sd0 {
		pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
		mux {
		pins = "gpio88";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio88";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_sd0_active: pri_mi2s_sd0_active {
		mux {
		pins = "gpio88";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio88";
		drive-strength = <16>; /* 16 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_mi2s_sd1 {
		pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
		mux {
		pins = "gpio86";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio86";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};
		pri_mi2s_sd1_active: pri_mi2s_sd1_active {
		mux {
		pins = "gpio86";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio86";
		drive-strength = <16>; /* 16 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};
		sec_mi2s_ws {
		sec_mi2s_ws_sleep: sec_mi2s_ws_sleep {
		mux {
		pins = "gpio95";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio95";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		};
		};
		sec_mi2s_ws_active: sec_mi2s_ws_active {
		mux {
		pins = "gpio95";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio95";
		drive-strength = <16>;
		bias-disable;
		output-high;
		};
		};
		};
		sec_mi2s_sck {
		sec_mi2s_sck_sleep: sec_mi2s_sck_sleep {
		mux {
		pins = "gpio94";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio94";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		};
		};
		sec_mi2s_sck_active: sec_mi2s_sck_active {
		mux {
		pins = "gpio94";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio94";
		drive-strength = <16>; /* 16 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		sec_mi2s_sd0 {
		sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep {
		mux {
		pins = "gpio12";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio12";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};
		sec_mi2s_sd0_active: sec_mi2s_sd0_active {
		mux {
		pins = "gpio12";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio12";
		drive-strength = <16>; /* 16 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		sec_mi2s_sd1 {
		sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep {
		mux {
		pins = "gpio13";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio13";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};
		sec_mi2s_sd1_active: sec_mi2s_sd1_active {
		mux {
		pins = "gpio13";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio13";
		drive-strength = <16>; /* 16 mA */
		bias-disable; /* NO PULL */
		};
		};
		};
		};
		};