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Commit 2a6a432a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  VIDEO: amba clcd: don't disable an already disabled clock
  ARM: Tighten check for allowable CPSR values
  ARM: 6329/1: wire up sys_accept4() on ARM
  ARM: 6328/1: Build with -fno-dwarf2-cfi-asm
  ARM: 6326/1: kgdb: fix GDB_MAX_REGS no longer used
parents a7c8962b 99c796df

arch/arm/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -21,6 +21,9 @@ GZFLAGS :=-9 
# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:

KBUILD_CFLAGS	+=$(call cc-option,-marm,)



# Never generate .eh_frame

KBUILD_CFLAGS	+= $(call cc-option,-fno-dwarf2-cfi-asm)



# Do not use arch/arm/defconfig - it's always outdated.

# Select a platform tht is kept up-to-date

KBUILD_DEFCONFIG := versatile_defconfig

arch/arm/include/asm/ptrace.h

+13 −4
Original line number Diff line number Diff line
@@ -158,15 +158,24 @@ struct pt_regs { 
 */

static inline int valid_user_regs(struct pt_regs *regs)

{

	if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) {

	unsigned long mode = regs->ARM_cpsr & MODE_MASK;



	/*

	 * Always clear the F (FIQ) and A (delayed abort) bits

	 */

	regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);



	if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {

		if (mode == USR_MODE)

			return 1;

		if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)

			return 1;

	}



	/*

	 * Force CPSR to something logical...

	 */

	regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT;

	regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;

	if (!(elf_hwcap & HWCAP_26BIT))

		regs->ARM_cpsr |= USR_MODE;

arch/arm/include/asm/unistd.h

+1 −0
Original line number Diff line number Diff line
@@ -392,6 +392,7 @@ 
#define __NR_rt_tgsigqueueinfo		(__NR_SYSCALL_BASE+363)

#define __NR_perf_event_open		(__NR_SYSCALL_BASE+364)

#define __NR_recvmmsg			(__NR_SYSCALL_BASE+365)

#define __NR_accept4			(__NR_SYSCALL_BASE+366)



/*

 * The following SWIs are ARM private.

arch/arm/kernel/calls.S

+1 −0
Original line number Diff line number Diff line
@@ -375,6 +375,7 @@ 
		CALL(sys_rt_tgsigqueueinfo)

		CALL(sys_perf_event_open)

/* 365 */	CALL(sys_recvmmsg)

		CALL(sys_accept4)

#ifndef syscalls_counted

.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls

#define syscalls_counted

arch/arm/kernel/kgdb.c

+1 −1
Original line number Diff line number Diff line
@@ -79,7 +79,7 @@ sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *task) 
		return;



	/* Initialize to zero */

	for (regno = 0; regno < GDB_MAX_REGS; regno++)

	for (regno = 0; regno < DBG_MAX_REG_NUM; regno++)

		gdb_regs[regno] = 0;



	/* Otherwise, we have only some registers from switch_to() */