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Commit 2a41ff81 authored by Jesse Brandeburg's avatar Jesse Brandeburg Committed by David S. Miller
Browse files

ixgbe: Cleanup on the Rx init path 



This cleans up the following pieces of the Rx initialization path:

- Enable the ECC memory fault interrupt in OTHER causes.

- Fix an 82598 initialization of RDRXCTL when depending on RSS and VMDq to
be enabled.  We don't need these features enabled to safely set the MVMEN
bit to allow multiple SRRCTL register mappings into the RXDCTL registers.

- Fix the RSS initialization path to not stomp on DCB accidentally.  When
configuring the MRQC (multiple Rx queue contol) register, we want to make
sure we only OR in features as necessary, instead of full assignment.

Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: default avatarPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9a1a69ad

drivers/net/ixgbe/ixgbe_main.c

+14 −15
Original line number Diff line number Diff line
@@ -1464,6 +1464,7 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter) 
	if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)

		mask |= IXGBE_EIMS_GPI_SDP1;

	if (adapter->hw.mac.type == ixgbe_mac_82599EB) {

		mask |= IXGBE_EIMS_ECC;

		mask |= IXGBE_EIMS_GPI_SDP1;

		mask |= IXGBE_EIMS_GPI_SDP2;

	}
@@ -1795,13 +1796,10 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) 
		 * effects of setting this bit are only that SRRCTL must be

		 * fully programmed [0..15]

		 */

		if (adapter->flags &

		    (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) {

		rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);

		rdrxctl |= IXGBE_RDRXCTL_MVMEN;

		IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);

	}

	}



	/* Program MRQC for the distribution of queues */

	if (hw->mac.type == ixgbe_mac_82599EB) {
@@ -1837,16 +1835,17 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) 
		for (i = 0; i < 10; i++)

			IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);



		mrqc = IXGBE_MRQC_RSSEN

		if (hw->mac.type == ixgbe_mac_82598EB)

			mrqc |= IXGBE_MRQC_RSSEN;

		    /* Perform hash on these packet types */

		       | IXGBE_MRQC_RSS_FIELD_IPV4

		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4

		      | IXGBE_MRQC_RSS_FIELD_IPV4_TCP

		      | IXGBE_MRQC_RSS_FIELD_IPV4_UDP

		      | IXGBE_MRQC_RSS_FIELD_IPV6

		      | IXGBE_MRQC_RSS_FIELD_IPV6_TCP

		      | IXGBE_MRQC_RSS_FIELD_IPV6_UDP;

		IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);

	}

	IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);



	rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);